Merge branch 'timers-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel...
[sfrench/cifs-2.6.git] / arch / riscv / boot / dts / sifive / fu540-c000.dtsi
index 42b5ec2231008ede5252f96b506fd50752eef018..afa43c7ea3690db3fceb535759652a9488d22049 100644 (file)
@@ -13,6 +13,7 @@
        aliases {
                serial0 = &uart0;
                serial1 = &uart1;
+               ethernet0 = &eth0;
        };
 
        chosen {
@@ -60,7 +61,6 @@
                        };
                };
                cpu2: cpu@2 {
-                       clock-frequency = <0>;
                        compatible = "sifive,u54-mc", "sifive,rocket0", "riscv";
                        d-cache-block-size = <64>;
                        d-cache-sets = <64>;
@@ -84,7 +84,6 @@
                        };
                };
                cpu3: cpu@3 {
-                       clock-frequency = <0>;
                        compatible = "sifive,u54-mc", "sifive,rocket0", "riscv";
                        d-cache-block-size = <64>;
                        d-cache-sets = <64>;
                        };
                };
                cpu4: cpu@4 {
-                       clock-frequency = <0>;
                        compatible = "sifive,u54-mc", "sifive,rocket0", "riscv";
                        d-cache-block-size = <64>;
                        d-cache-sets = <64>;
                        #size-cells = <0>;
                        status = "disabled";
                };
+               pwm0: pwm@10020000 {
+                       compatible = "sifive,fu540-c000-pwm", "sifive,pwm0";
+                       reg = <0x0 0x10020000 0x0 0x1000>;
+                       interrupt-parent = <&plic0>;
+                       interrupts = <42 43 44 45>;
+                       clocks = <&prci PRCI_CLK_TLCLK>;
+                       #pwm-cells = <3>;
+                       status = "disabled";
+               };
+               pwm1: pwm@10021000 {
+                       compatible = "sifive,fu540-c000-pwm", "sifive,pwm0";
+                       reg = <0x0 0x10021000 0x0 0x1000>;
+                       interrupt-parent = <&plic0>;
+                       interrupts = <46 47 48 49>;
+                       clocks = <&prci PRCI_CLK_TLCLK>;
+                       #pwm-cells = <3>;
+                       status = "disabled";
+               };
 
        };
 };