Remove obsolete #include <linux/config.h>

[sfrench/cifs-2.6.git] / arch / powerpc / platforms / powermac / nvram.c

diff --git a/arch/powerpc/platforms/powermac/nvram.c b/arch/powerpc/platforms/powermac/nvram.c
index 4042e2f06ee0f671c536ec16456fe009db94adc1..41fa2409482a887e2b927fde6883f3d65675e82c 100644 (file)
--- a/arch/powerpc/platforms/powermac/nvram.c
+++ b/arch/powerpc/platforms/powermac/nvram.c
@@ -1,6 +1,4 @@
 /*
- *  arch/ppc/platforms/pmac_nvram.c
- *
  *  Copyright (C) 2002 Benjamin Herrenschmidt (benh@kernel.crashing.org)
  *
  *  This program is free software; you can redistribute it and/or
@@ -10,7 +8,6 @@
  *
  *  Todo: - add support for the OF persistent properties
  */
-#include <linux/config.h>
 #include <linux/module.h>
 #include <linux/kernel.h>
 #include <linux/stddef.h>
@@ -76,7 +73,7 @@ struct core99_header {
  * Read and write the non-volatile RAM on PowerMacs and CHRP machines.
  */
 static int nvram_naddrs;
-static volatile unsigned char *nvram_data;
+static volatile unsigned char __iomem *nvram_data;
 static int is_core_99;
 static int core99_bank = 0;
 static int nvram_partitions[3];
@@ -150,7 +147,7 @@ static ssize_t core99_nvram_size(void)
 }
 
 #ifdef CONFIG_PPC32
-static volatile unsigned char *nvram_addr;
+static volatile unsigned char __iomem *nvram_addr;
 static int nvram_mult;
 
 static unsigned char direct_nvram_read_byte(int addr)
@@ -287,7 +284,7 @@ static int sm_erase_bank(int bank)
        int stat, i;
        unsigned long timeout;
 
-       u8* base = (u8 *)nvram_data + core99_bank*NVRAM_SIZE;
+       u8 __iomem *base = (u8 __iomem *)nvram_data + core99_bank*NVRAM_SIZE;
 
                DBG("nvram: Sharp/Micron Erasing bank %d...\n", bank);
 
@@ -319,7 +316,7 @@ static int sm_write_bank(int bank, u8* datas)
        int i, stat = 0;
        unsigned long timeout;
 
-       u8* base = (u8 *)nvram_data + core99_bank*NVRAM_SIZE;
+       u8 __iomem *base = (u8 __iomem *)nvram_data + core99_bank*NVRAM_SIZE;
 
                DBG("nvram: Sharp/Micron Writing bank %d...\n", bank);
 
@@ -354,7 +351,7 @@ static int amd_erase_bank(int bank)
        int i, stat = 0;
        unsigned long timeout;
 
-       u8* base = (u8 *)nvram_data + core99_bank*NVRAM_SIZE;
+       u8 __iomem *base = (u8 __iomem *)nvram_data + core99_bank*NVRAM_SIZE;
 
                DBG("nvram: AMD Erasing bank %d...\n", bank);
 
@@ -401,7 +398,7 @@ static int amd_write_bank(int bank, u8* datas)
        int i, stat = 0;
        unsigned long timeout;
 
-       u8* base = (u8 *)nvram_data + core99_bank*NVRAM_SIZE;
+       u8 __iomem *base = (u8 __iomem *)nvram_data + core99_bank*NVRAM_SIZE;
 
                DBG("nvram: AMD Writing bank %d...\n", bank);
 
@@ -514,7 +511,7 @@ static void core99_nvram_sync(void)
 #endif
 }
 
-static int __init core99_nvram_setup(struct device_node *dp)
+static int __init core99_nvram_setup(struct device_node *dp, unsigned long addr)
 {
        int i;
        u32 gen_bank0, gen_bank1;
@@ -528,7 +525,7 @@ static int __init core99_nvram_setup(struct device_node *dp)
                printk(KERN_ERR "nvram: can't allocate ram image\n");
                return -ENOMEM;
        }
-       nvram_data = ioremap(dp->addrs[0].address, NVRAM_SIZE*2);
+       nvram_data = ioremap(addr, NVRAM_SIZE*2);
        nvram_naddrs = 1; /* Make sure we get the correct case */
 
        DBG("nvram: Checking bank 0...\n");
@@ -549,6 +546,7 @@ static int __init core99_nvram_setup(struct device_node *dp)
        ppc_md.nvram_write      = core99_nvram_write;
        ppc_md.nvram_size       = core99_nvram_size;
        ppc_md.nvram_sync       = core99_nvram_sync;
+       ppc_md.machine_shutdown = core99_nvram_sync;
        /* 
         * Maybe we could be smarter here though making an exclusive list
         * of known flash chips is a bit nasty as older OF didn't provide us
@@ -569,34 +567,48 @@ static int __init core99_nvram_setup(struct device_node *dp)
 int __init pmac_nvram_init(void)
 {
        struct device_node *dp;
+       struct resource r1, r2;
+       unsigned int s1 = 0, s2 = 0;
        int err = 0;
 
        nvram_naddrs = 0;
 
-       dp = find_devices("nvram");
+       dp = of_find_node_by_name(NULL, "nvram");
        if (dp == NULL) {
                printk(KERN_ERR "Can't find NVRAM device\n");
                return -ENODEV;
        }
-       nvram_naddrs = dp->n_addrs;
+
+       /* Try to obtain an address */
+       if (of_address_to_resource(dp, 0, &r1) == 0) {
+               nvram_naddrs = 1;
+               s1 = (r1.end - r1.start) + 1;
+               if (of_address_to_resource(dp, 1, &r2) == 0) {
+                       nvram_naddrs = 2;
+                       s2 = (r2.end - r2.start) + 1;
+               }
+       }
+
        is_core_99 = device_is_compatible(dp, "nvram,flash");
-       if (is_core_99)
-               err = core99_nvram_setup(dp);
+       if (is_core_99) {
+               err = core99_nvram_setup(dp, r1.start);
+               goto bail;
+       }
+
 #ifdef CONFIG_PPC32
-       else if (_machine == _MACH_chrp && nvram_naddrs == 1) {
-               nvram_data = ioremap(dp->addrs[0].address + isa_mem_base,
-                                    dp->addrs[0].size);
+       if (machine_is(chrp) && nvram_naddrs == 1) {
+               nvram_data = ioremap(r1.start, s1);
                nvram_mult = 1;
                ppc_md.nvram_read_val   = direct_nvram_read_byte;
                ppc_md.nvram_write_val  = direct_nvram_write_byte;
        } else if (nvram_naddrs == 1) {
-               nvram_data = ioremap(dp->addrs[0].address, dp->addrs[0].size);
-               nvram_mult = (dp->addrs[0].size + NVRAM_SIZE - 1) / NVRAM_SIZE;
+               nvram_data = ioremap(r1.start, s1);
+               nvram_mult = (s1 + NVRAM_SIZE - 1) / NVRAM_SIZE;
                ppc_md.nvram_read_val   = direct_nvram_read_byte;
                ppc_md.nvram_write_val  = direct_nvram_write_byte;
        } else if (nvram_naddrs == 2) {
-               nvram_addr = ioremap(dp->addrs[0].address, dp->addrs[0].size);
-               nvram_data = ioremap(dp->addrs[1].address, dp->addrs[1].size);
+               nvram_addr = ioremap(r1.start, s1);
+               nvram_data = ioremap(r2.start, s2);
                ppc_md.nvram_read_val   = indirect_nvram_read_byte;
                ppc_md.nvram_write_val  = indirect_nvram_write_byte;
        } else if (nvram_naddrs == 0 && sys_ctrler == SYS_CTRLER_PMU) {
@@ -605,13 +617,15 @@ int __init pmac_nvram_init(void)
                ppc_md.nvram_read_val   = pmu_nvram_read_byte;
                ppc_md.nvram_write_val  = pmu_nvram_write_byte;
 #endif /* CONFIG_ADB_PMU */
-       }
-#endif
-       else {
+       } else {
                printk(KERN_ERR "Incompatible type of NVRAM\n");
-               return -ENXIO;
+               err = -ENXIO;
        }
-       lookup_partitions();
+#endif /* CONFIG_PPC32 */
+bail:
+       of_node_put(dp);
+       if (err == 0)
+               lookup_partitions();
        return err;
 }