Merge master.kernel.org:/home/rmk/linux-2.6-arm
[sfrench/cifs-2.6.git] / arch / powerpc / boot / dts / mpc8541cds.dts
index 4f2c3af2e052c957dd94bd0365909b8aa663cdc6..fb0b647f8c2a69966e21ae36418a19fbddc8a144 100644 (file)
@@ -52,7 +52,7 @@
                        compatible = "fsl,8541-memory-controller";
                        reg = <2000 1000>;
                        interrupt-parent = <&mpic>;
-                       interrupts = <2 2>;
+                       interrupts = <12 2>;
                };
 
                l2-cache-controller@20000 {
                        cache-line-size = <20>; // 32 bytes
                        cache-size = <40000>;   // L2, 256K
                        interrupt-parent = <&mpic>;
-                       interrupts = <0 2>;
+                       interrupts = <10 2>;
                };
 
                i2c@3000 {
                        device_type = "i2c";
                        compatible = "fsl-i2c";
                        reg = <3000 100>;
-                       interrupts = <1b 2>;
+                       interrupts = <2b 2>;
                        interrupt-parent = <&mpic>;
                        dfsrr;
                };
                        reg = <24520 20>;
                        phy0: ethernet-phy@0 {
                                interrupt-parent = <&mpic>;
-                               interrupts = <35 0>;
+                               interrupts = <5 1>;
                                reg = <0>;
                                device_type = "ethernet-phy";
                        };
                        phy1: ethernet-phy@1 {
                                interrupt-parent = <&mpic>;
-                               interrupts = <35 0>;
+                               interrupts = <5 1>;
                                reg = <1>;
                                device_type = "ethernet-phy";
                        };
                        model = "TSEC";
                        compatible = "gianfar";
                        reg = <24000 1000>;
-                       local-mac-address = [ 00 E0 0C 00 73 00 ];
-                       interrupts = <d 2 e 2 12 2>;
+                       local-mac-address = [ 00 00 00 00 00 00 ];
+                       interrupts = <1d 2 1e 2 22 2>;
                        interrupt-parent = <&mpic>;
                        phy-handle = <&phy0>;
                };
                        model = "TSEC";
                        compatible = "gianfar";
                        reg = <25000 1000>;
-                       local-mac-address = [ 00 E0 0C 00 73 01 ];
-                       interrupts = <13 2 14 2 18 2>;
+                       local-mac-address = [ 00 00 00 00 00 00 ];
+                       interrupts = <23 2 24 2 28 2>;
                        interrupt-parent = <&mpic>;
                        phy-handle = <&phy1>;
                };
                        compatible = "ns16550";
                        reg = <4500 100>;       // reg base, size
                        clock-frequency = <0>;  // should we fill in in uboot?
-                       interrupts = <1a 2>;
+                       interrupts = <2a 2>;
                        interrupt-parent = <&mpic>;
                };
 
                        compatible = "ns16550";
                        reg = <4600 100>;       // reg base, size
                        clock-frequency = <0>;  // should we fill in in uboot?
-                       interrupts = <1a 2>;
+                       interrupts = <2a 2>;
                        interrupt-parent = <&mpic>;
                };
 
                        interrupt-map = <
 
                                /* IDSEL 0x10 */
-                               08000 0 0 1 &mpic 30 1
-                               08000 0 0 2 &mpic 31 1
-                               08000 0 0 3 &mpic 32 1
-                               08000 0 0 4 &mpic 33 1
+                               08000 0 0 1 &mpic 0 1
+                               08000 0 0 2 &mpic 1 1
+                               08000 0 0 3 &mpic 2 1
+                               08000 0 0 4 &mpic 3 1
 
                                /* IDSEL 0x11 */
-                               08800 0 0 1 &mpic 30 1
-                               08800 0 0 2 &mpic 31 1
-                               08800 0 0 3 &mpic 32 1
-                               08800 0 0 4 &mpic 33 1
+                               08800 0 0 1 &mpic 0 1
+                               08800 0 0 2 &mpic 1 1
+                               08800 0 0 3 &mpic 2 1
+                               08800 0 0 4 &mpic 3 1
 
                                /* IDSEL 0x12 (Slot 1) */
-                               09000 0 0 1 &mpic 30 1
-                               09000 0 0 2 &mpic 31 1
-                               09000 0 0 3 &mpic 32 1
-                               09000 0 0 4 &mpic 33 1
+                               09000 0 0 1 &mpic 0 1
+                               09000 0 0 2 &mpic 1 1
+                               09000 0 0 3 &mpic 2 1
+                               09000 0 0 4 &mpic 3 1
 
                                /* IDSEL 0x13 (Slot 2) */
-                               09800 0 0 1 &mpic 31 1
-                               09800 0 0 2 &mpic 32 1
-                               09800 0 0 3 &mpic 33 1
-                               09800 0 0 4 &mpic 30 1
+                               09800 0 0 1 &mpic 1 1
+                               09800 0 0 2 &mpic 2 1
+                               09800 0 0 3 &mpic 3 1
+                               09800 0 0 4 &mpic 0 1
 
                                /* IDSEL 0x14 (Slot 3) */
-                               0a000 0 0 1 &mpic 32 1
-                               0a000 0 0 2 &mpic 33 1
-                               0a000 0 0 3 &mpic 30 1
-                               0a000 0 0 4 &mpic 31 1
+                               0a000 0 0 1 &mpic 2 1
+                               0a000 0 0 2 &mpic 3 1
+                               0a000 0 0 3 &mpic 0 1
+                               0a000 0 0 4 &mpic 1 1
 
                                /* IDSEL 0x15 (Slot 4) */
-                               0a800 0 0 1 &mpic 33 1
-                               0a800 0 0 2 &mpic 30 1
-                               0a800 0 0 3 &mpic 31 1
-                               0a800 0 0 4 &mpic 32 1
+                               0a800 0 0 1 &mpic 3 1
+                               0a800 0 0 2 &mpic 0 1
+                               0a800 0 0 3 &mpic 1 1
+                               0a800 0 0 4 &mpic 2 1
 
                                /* Bus 1 (Tundra Bridge) */
                                /* IDSEL 0x12 (ISA bridge) */
-                               19000 0 0 1 &mpic 30 1
-                               19000 0 0 2 &mpic 31 1
-                               19000 0 0 3 &mpic 32 1
-                               19000 0 0 4 &mpic 33 1>;
+                               19000 0 0 1 &mpic 0 1
+                               19000 0 0 2 &mpic 1 1
+                               19000 0 0 3 &mpic 2 1
+                               19000 0 0 4 &mpic 3 1>;
                        interrupt-parent = <&mpic>;
-                       interrupts = <08 2>;
+                       interrupts = <18 2>;
                        bus-range = <0 0>;
                        ranges = <02000000 0 80000000 80000000 0 20000000
                                  01000000 0 00000000 e2000000 0 00100000>;
                        #size-cells = <2>;
                        #address-cells = <3>;
                        reg = <8000 1000>;
-                       compatible = "85xx";
+                       compatible = "fsl,mpc8540-pci";
                        device_type = "pci";
 
                        i8259@19000 {
                        interrupt-map = <
 
                                /* IDSEL 0x15 */
-                               a800 0 0 1 &mpic 3b 1
-                               a800 0 0 2 &mpic 3b 1
-                               a800 0 0 3 &mpic 3b 1
-                               a800 0 0 4 &mpic 3b 1>;
+                               a800 0 0 1 &mpic b 1
+                               a800 0 0 2 &mpic b 1
+                               a800 0 0 3 &mpic b 1
+                               a800 0 0 4 &mpic b 1>;
                        interrupt-parent = <&mpic>;
-                       interrupts = <09 2>;
+                       interrupts = <19 2>;
                        bus-range = <0 0>;
                        ranges = <02000000 0 a0000000 a0000000 0 20000000
                                  01000000 0 00000000 e3000000 0 00100000>;
                        #size-cells = <2>;
                        #address-cells = <3>;
                        reg = <9000 1000>;
-                       compatible = "85xx";
+                       compatible = "fsl,mpc8540-pci";
                        device_type = "pci";
                };