PowerPC,8377@0 {
device_type = "cpu";
- reg = <0>;
- d-cache-line-size = <0x20>;
- i-cache-line-size = <0x20>;
- d-cache-size = <0x8000>; // L1, 32K
- i-cache-size = <0x8000>; // L1, 32K
+ reg = <0x0>;
+ d-cache-line-size = <32>;
+ i-cache-line-size = <32>;
+ d-cache-size = <32768>;
+ i-cache-size = <32768>;
timebase-frequency = <0>;
bus-frequency = <0>;
clock-frequency = <0>;
reg = <0x00000000 0x20000000>; // 512MB at 0
};
+ localbus@e0005000 {
+ #address-cells = <2>;
+ #size-cells = <1>;
+ compatible = "fsl,mpc8377-elbc", "fsl,elbc", "simple-bus";
+ reg = <0xe0005000 0x1000>;
+ interrupts = <77 0x8>;
+ interrupt-parent = <&ipic>;
+
+ // booting from NOR flash
+ ranges = <0 0x0 0xfe000000 0x02000000
+ 1 0x0 0xf8000000 0x00008000
+ 3 0x0 0xe0600000 0x00008000>;
+
+ flash@0,0 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "cfi-flash";
+ reg = <0 0x0 0x2000000>;
+ bank-width = <2>;
+ device-width = <1>;
+
+ u-boot@0 {
+ reg = <0x0 0x100000>;
+ read-only;
+ };
+
+ fs@100000 {
+ reg = <0x100000 0x800000>;
+ };
+
+ kernel@1d00000 {
+ reg = <0x1d00000 0x200000>;
+ };
+
+ dtb@1f00000 {
+ reg = <0x1f00000 0x100000>;
+ };
+ };
+
+ bcsr@1,0 {
+ reg = <1 0x0 0x8000>;
+ compatible = "fsl,mpc837xmds-bcsr";
+ };
+
+ nand@3,0 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "fsl,mpc8377-fcm-nand",
+ "fsl,elbc-fcm-nand";
+ reg = <3 0x0 0x8000>;
+
+ u-boot@0 {
+ reg = <0x0 0x100000>;
+ read-only;
+ };
+
+ kernel@100000 {
+ reg = <0x100000 0x300000>;
+ };
+
+ fs@400000 {
+ reg = <0x400000 0x1c00000>;
+ };
+ };
+ };
+
soc@e0000000 {
#address-cells = <1>;
#size-cells = <1>;
cell-index = <0>;
compatible = "fsl-i2c";
reg = <0x3000 0x100>;
- interrupts = <0xe 0x8>;
- interrupt-parent = < &ipic >;
+ interrupts = <14 0x8>;
+ interrupt-parent = <&ipic>;
dfsrr;
};
cell-index = <1>;
compatible = "fsl-i2c";
reg = <0x3100 0x100>;
- interrupts = <0xf 0x8>;
- interrupt-parent = < &ipic >;
+ interrupts = <15 0x8>;
+ interrupt-parent = <&ipic>;
dfsrr;
};
spi@7000 {
- compatible = "fsl_spi";
+ cell-index = <0>;
+ compatible = "fsl,spi";
reg = <0x7000 0x1000>;
- interrupts = <0x10 0x8>;
- interrupt-parent = < &ipic >;
+ interrupts = <16 0x8>;
+ interrupt-parent = <&ipic>;
mode = "cpu";
};
- /* phy type (ULPI, UTMI, UTMI_WIDE, SERIAL) */
usb@23000 {
compatible = "fsl-usb2-dr";
reg = <0x23000 0x1000>;
#address-cells = <1>;
#size-cells = <0>;
- interrupt-parent = < &ipic >;
- interrupts = <0x26 0x8>;
- phy_type = "utmi_wide";
+ interrupt-parent = <&ipic>;
+ interrupts = <38 0x8>;
+ dr_mode = "host";
+ phy_type = "ulpi";
};
mdio@24520 {
compatible = "fsl,gianfar-mdio";
reg = <0x24520 0x20>;
phy2: ethernet-phy@2 {
- interrupt-parent = < &ipic >;
- interrupts = <0x11 0x8>;
- reg = <2>;
+ interrupt-parent = <&ipic>;
+ interrupts = <17 0x8>;
+ reg = <0x2>;
device_type = "ethernet-phy";
};
phy3: ethernet-phy@3 {
- interrupt-parent = < &ipic >;
- interrupts = <0x12 0x8>;
- reg = <3>;
+ interrupt-parent = <&ipic>;
+ interrupts = <18 0x8>;
+ reg = <0x3>;
device_type = "ethernet-phy";
};
};
compatible = "gianfar";
reg = <0x24000 0x1000>;
local-mac-address = [ 00 00 00 00 00 00 ];
- interrupts = <0x20 0x8 0x21 0x8 0x22 0x8>;
+ interrupts = <32 0x8 33 0x8 34 0x8>;
phy-connection-type = "mii";
- interrupt-parent = < &ipic >;
- phy-handle = < &phy2 >;
+ interrupt-parent = <&ipic>;
+ phy-handle = <&phy2>;
};
enet1: ethernet@25000 {
compatible = "gianfar";
reg = <0x25000 0x1000>;
local-mac-address = [ 00 00 00 00 00 00 ];
- interrupts = <0x23 0x8 0x24 0x8 0x25 0x8>;
+ interrupts = <35 0x8 36 0x8 37 0x8>;
phy-connection-type = "mii";
- interrupt-parent = < &ipic >;
- phy-handle = < &phy3 >;
+ interrupt-parent = <&ipic>;
+ phy-handle = <&phy3>;
};
serial0: serial@4500 {
compatible = "ns16550";
reg = <0x4500 0x100>;
clock-frequency = <0>;
- interrupts = <0x9 0x8>;
- interrupt-parent = < &ipic >;
+ interrupts = <9 0x8>;
+ interrupt-parent = <&ipic>;
};
serial1: serial@4600 {
compatible = "ns16550";
reg = <0x4600 0x100>;
clock-frequency = <0>;
- interrupts = <0xa 0x8>;
- interrupt-parent = < &ipic >;
+ interrupts = <10 0x8>;
+ interrupt-parent = <&ipic>;
};
crypto@30000 {
model = "SEC3";
compatible = "talitos";
reg = <0x30000 0x10000>;
- interrupts = <0xb 0x8>;
- interrupt-parent = < &ipic >;
+ interrupts = <11 0x8>;
+ interrupt-parent = <&ipic>;
/* Rev. 3.0 geometry */
num-channels = <4>;
- channel-fifo-len = <0x18>;
+ channel-fifo-len = <24>;
exec-units-mask = <0x000001fe>;
descriptor-types-mask = <0x03ab0ebf>;
};
model = "eSDHC";
compatible = "fsl,esdhc";
reg = <0x2e000 0x1000>;
- interrupts = <0x2a 0x8>;
- interrupt-parent = < &ipic >;
+ interrupts = <42 0x8>;
+ interrupt-parent = <&ipic>;
};
sata@18000 {
compatible = "fsl,mpc8379-sata";
reg = <0x18000 0x1000>;
- interrupts = <0x2c 0x8>;
- interrupt-parent = < &ipic >;
+ interrupts = <44 0x8>;
+ interrupt-parent = <&ipic>;
};
sata@19000 {
compatible = "fsl,mpc8379-sata";
reg = <0x19000 0x1000>;
- interrupts = <0x2d 0x8>;
- interrupt-parent = < &ipic >;
+ interrupts = <45 0x8>;
+ interrupt-parent = <&ipic>;
};
/* IPIC
interrupt-map = <
/* IDSEL 0x11 */
- 0x8800 0x0 0x0 0x1 &ipic 0x14 0x8
- 0x8800 0x0 0x0 0x2 &ipic 0x15 0x8
- 0x8800 0x0 0x0 0x3 &ipic 0x16 0x8
- 0x8800 0x0 0x0 0x4 &ipic 0x17 0x8
+ 0x8800 0x0 0x0 0x1 &ipic 20 0x8
+ 0x8800 0x0 0x0 0x2 &ipic 21 0x8
+ 0x8800 0x0 0x0 0x3 &ipic 22 0x8
+ 0x8800 0x0 0x0 0x4 &ipic 23 0x8
/* IDSEL 0x12 */
- 0x9000 0x0 0x0 0x1 &ipic 0x16 0x8
- 0x9000 0x0 0x0 0x2 &ipic 0x17 0x8
- 0x9000 0x0 0x0 0x3 &ipic 0x14 0x8
- 0x9000 0x0 0x0 0x4 &ipic 0x15 0x8
+ 0x9000 0x0 0x0 0x1 &ipic 22 0x8
+ 0x9000 0x0 0x0 0x2 &ipic 23 0x8
+ 0x9000 0x0 0x0 0x3 &ipic 20 0x8
+ 0x9000 0x0 0x0 0x4 &ipic 21 0x8
/* IDSEL 0x13 */
- 0x9800 0x0 0x0 0x1 &ipic 0x17 0x8
- 0x9800 0x0 0x0 0x2 &ipic 0x14 0x8
- 0x9800 0x0 0x0 0x3 &ipic 0x15 0x8
- 0x9800 0x0 0x0 0x4 &ipic 0x16 0x8
+ 0x9800 0x0 0x0 0x1 &ipic 23 0x8
+ 0x9800 0x0 0x0 0x2 &ipic 20 0x8
+ 0x9800 0x0 0x0 0x3 &ipic 21 0x8
+ 0x9800 0x0 0x0 0x4 &ipic 22 0x8
/* IDSEL 0x15 */
- 0xa800 0x0 0x0 0x1 &ipic 0x14 0x8
- 0xa800 0x0 0x0 0x2 &ipic 0x15 0x8
- 0xa800 0x0 0x0 0x3 &ipic 0x16 0x8
- 0xa800 0x0 0x0 0x4 &ipic 0x17 0x8
+ 0xa800 0x0 0x0 0x1 &ipic 20 0x8
+ 0xa800 0x0 0x0 0x2 &ipic 21 0x8
+ 0xa800 0x0 0x0 0x3 &ipic 22 0x8
+ 0xa800 0x0 0x0 0x4 &ipic 23 0x8
/* IDSEL 0x16 */
- 0xb000 0x0 0x0 0x1 &ipic 0x17 0x8
- 0xb000 0x0 0x0 0x2 &ipic 0x14 0x8
- 0xb000 0x0 0x0 0x3 &ipic 0x15 0x8
- 0xb000 0x0 0x0 0x4 &ipic 0x16 0x8
+ 0xb000 0x0 0x0 0x1 &ipic 23 0x8
+ 0xb000 0x0 0x0 0x2 &ipic 20 0x8
+ 0xb000 0x0 0x0 0x3 &ipic 21 0x8
+ 0xb000 0x0 0x0 0x4 &ipic 22 0x8
/* IDSEL 0x17 */
- 0xb800 0x0 0x0 0x1 &ipic 0x16 0x8
- 0xb800 0x0 0x0 0x2 &ipic 0x17 0x8
- 0xb800 0x0 0x0 0x3 &ipic 0x14 0x8
- 0xb800 0x0 0x0 0x4 &ipic 0x15 0x8
+ 0xb800 0x0 0x0 0x1 &ipic 22 0x8
+ 0xb800 0x0 0x0 0x2 &ipic 23 0x8
+ 0xb800 0x0 0x0 0x3 &ipic 20 0x8
+ 0xb800 0x0 0x0 0x4 &ipic 21 0x8
/* IDSEL 0x18 */
- 0xc000 0x0 0x0 0x1 &ipic 0x15 0x8
- 0xc000 0x0 0x0 0x2 &ipic 0x16 0x8
- 0xc000 0x0 0x0 0x3 &ipic 0x17 0x8
- 0xc000 0x0 0x0 0x4 &ipic 0x14 0x8>;
- interrupt-parent = < &ipic >;
- interrupts = <0x42 0x8>;
- bus-range = <0 0>;
+ 0xc000 0x0 0x0 0x1 &ipic 21 0x8
+ 0xc000 0x0 0x0 0x2 &ipic 22 0x8
+ 0xc000 0x0 0x0 0x3 &ipic 23 0x8
+ 0xc000 0x0 0x0 0x4 &ipic 20 0x8>;
+ interrupt-parent = <&ipic>;
+ interrupts = <66 0x8>;
+ bus-range = <0x0 0x0>;
ranges = <0x02000000 0x0 0x90000000 0x90000000 0x0 0x10000000
0x42000000 0x0 0x80000000 0x80000000 0x0 0x10000000
0x01000000 0x0 0x00000000 0xe0300000 0x0 0x00100000>;
git.samba.org / sfrench / cifs-2.6.git / blobdiff