[SCSI] Initial Commit of qla4xxx

[sfrench/cifs-2.6.git] / arch / mips / ite-boards / generic / irq.c

diff --git a/arch/mips/ite-boards/generic/irq.c b/arch/mips/ite-boards/generic/irq.c
index e67f96129491009074f28187a7ee72edd9b864c9..cb59ca4f76f0450821d419a642eeb307320ea4cd 100644 (file)
--- a/arch/mips/ite-boards/generic/irq.c
+++ b/arch/mips/ite-boards/generic/irq.c
@@ -62,12 +62,8 @@
 
 #define ALLINTS_NOTIMER (IE_IRQ0 | IE_IRQ1 | IE_IRQ2 | IE_IRQ3 | IE_IRQ4)
 
-void disable_it8172_irq(unsigned int irq_nr);
-void enable_it8172_irq(unsigned int irq_nr);
-
 extern void set_debug_traps(void);
 extern void mips_timer_interrupt(int irq, struct pt_regs *regs);
-extern asmlinkage void it8172_IRQ(void);
 
 struct it8172_intc_regs volatile *it8172_hw0_icregs =
        (struct it8172_intc_regs volatile *)(KSEG1ADDR(IT8172_PCI_IO_BASE + IT_INTC_BASE));
@@ -137,7 +133,7 @@ static void end_ite_irq(unsigned int irq)
                enable_it8172_irq(irq);
 }
 
-static struct hw_interrupt_type it8172_irq_type = {
+static struct irq_chip it8172_irq_type = {
        .typename = "ITE8172",
        .startup = startup_ite_irq,
        .shutdown = shutdown_ite_irq,
@@ -157,7 +153,7 @@ static void ack_none(unsigned int irq) { }
 #define shutdown_none  disable_none
 #define end_none       enable_none
 
-static struct hw_interrupt_type cp0_irq_type = {
+static struct irq_chip cp0_irq_type = {
        .typename = "CP0 Count",
        .startup = startup_none,
        .shutdown = shutdown_none,
@@ -181,8 +177,6 @@ void __init arch_init_irq(void)
        int i;
         unsigned long flags;
 
-        set_except_vector(0, it8172_IRQ);
-
        /* mask all interrupts */
        it8172_hw0_icregs->lb_mask  = 0xffff;
        it8172_hw0_icregs->lpc_mask = 0xffff;
@@ -214,10 +208,10 @@ void __init arch_init_irq(void)
 #endif
 
        for (i = 0; i <= IT8172_LAST_IRQ; i++) {
-               irq_desc[i].handler = &it8172_irq_type;
+               irq_desc[i].chip = &it8172_irq_type;
                spin_lock_init(&irq_desc[i].lock);
        }
-       irq_desc[MIPS_CPU_TIMER_IRQ].handler = &cp0_irq_type;
+       irq_desc[MIPS_CPU_TIMER_IRQ].chip = &cp0_irq_type;
        set_c0_status(ALLINTS_NOTIMER);
 }
 
@@ -282,6 +276,18 @@ void it8172_hw0_irqdispatch(struct pt_regs *regs)
        do_IRQ(irq, regs);
 }
 
+asmlinkage void plat_irq_dispatch(struct pt_regs *regs)
+{
+       unsigned int pending = read_c0_cause() & read_c0_status() & ST0_IM;
+
+       if (!pending)
+               mips_spurious_interrupt(regs);
+       else if (pending & CAUSEF_IP7)
+               ll_timer_interrupt(127, regs);
+       else if (pending & CAUSEF_IP2)
+               it8172_hw0_irqdispatch(regs);
+}
+
 void show_pending_irqs(void)
 {
        fputs("intstatus:  ");