Merge tag '9p-for-4.20' of git://github.com/martinetd/linux
[sfrench/cifs-2.6.git] / arch / mips / include / asm / r4kcache.h
index 7f12d7e27c94ef5e78a49478359cad68bc4a1eb4..d19b2d65336b9e2cea03c68dec131483a28c1da3 100644 (file)
@@ -48,58 +48,14 @@ extern void (*r4k_blast_icache)(void);
        :                                                               \
        : "i" (op), "R" (*(unsigned char *)(addr)))
 
-#ifdef CONFIG_MIPS_MT
-
-#define __iflush_prologue                                              \
-       unsigned long redundance;                                       \
-       extern int mt_n_iflushes;                                       \
-       for (redundance = 0; redundance < mt_n_iflushes; redundance++) {
-
-#define __iflush_epilogue                                              \
-       }
-
-#define __dflush_prologue                                              \
-       unsigned long redundance;                                       \
-       extern int mt_n_dflushes;                                       \
-       for (redundance = 0; redundance < mt_n_dflushes; redundance++) {
-
-#define __dflush_epilogue \
-       }
-
-#define __inv_dflush_prologue __dflush_prologue
-#define __inv_dflush_epilogue __dflush_epilogue
-#define __sflush_prologue {
-#define __sflush_epilogue }
-#define __inv_sflush_prologue __sflush_prologue
-#define __inv_sflush_epilogue __sflush_epilogue
-
-#else /* CONFIG_MIPS_MT */
-
-#define __iflush_prologue {
-#define __iflush_epilogue }
-#define __dflush_prologue {
-#define __dflush_epilogue }
-#define __inv_dflush_prologue {
-#define __inv_dflush_epilogue }
-#define __sflush_prologue {
-#define __sflush_epilogue }
-#define __inv_sflush_prologue {
-#define __inv_sflush_epilogue }
-
-#endif /* CONFIG_MIPS_MT */
-
 static inline void flush_icache_line_indexed(unsigned long addr)
 {
-       __iflush_prologue
        cache_op(Index_Invalidate_I, addr);
-       __iflush_epilogue
 }
 
 static inline void flush_dcache_line_indexed(unsigned long addr)
 {
-       __dflush_prologue
        cache_op(Index_Writeback_Inv_D, addr);
-       __dflush_epilogue
 }
 
 static inline void flush_scache_line_indexed(unsigned long addr)
@@ -109,7 +65,6 @@ static inline void flush_scache_line_indexed(unsigned long addr)
 
 static inline void flush_icache_line(unsigned long addr)
 {
-       __iflush_prologue
        switch (boot_cpu_type()) {
        case CPU_LOONGSON2:
                cache_op(Hit_Invalidate_I_Loongson2, addr);
@@ -119,21 +74,16 @@ static inline void flush_icache_line(unsigned long addr)
                cache_op(Hit_Invalidate_I, addr);
                break;
        }
-       __iflush_epilogue
 }
 
 static inline void flush_dcache_line(unsigned long addr)
 {
-       __dflush_prologue
        cache_op(Hit_Writeback_Inv_D, addr);
-       __dflush_epilogue
 }
 
 static inline void invalidate_dcache_line(unsigned long addr)
 {
-       __dflush_prologue
        cache_op(Hit_Invalidate_D, addr);
-       __dflush_epilogue
 }
 
 static inline void invalidate_scache_line(unsigned long addr)
@@ -586,13 +536,9 @@ static inline void extra##blast_##pfx##cache##lsize(void)          \
                               current_cpu_data.desc.waybit;            \
        unsigned long ws, addr;                                         \
                                                                        \
-       __##pfx##flush_prologue                                         \
-                                                                       \
        for (ws = 0; ws < ws_end; ws += ws_inc)                         \
                for (addr = start; addr < end; addr += lsize * 32)      \
                        cache##lsize##_unroll32(addr|ws, indexop);      \
-                                                                       \
-       __##pfx##flush_epilogue                                         \
 }                                                                      \
                                                                        \
 static inline void extra##blast_##pfx##cache##lsize##_page(unsigned long page) \
@@ -600,14 +546,10 @@ static inline void extra##blast_##pfx##cache##lsize##_page(unsigned long page) \
        unsigned long start = page;                                     \
        unsigned long end = page + PAGE_SIZE;                           \
                                                                        \
-       __##pfx##flush_prologue                                         \
-                                                                       \
        do {                                                            \
                cache##lsize##_unroll32(start, hitop);                  \
                start += lsize * 32;                                    \
        } while (start < end);                                          \
-                                                                       \
-       __##pfx##flush_epilogue                                         \
 }                                                                      \
                                                                        \
 static inline void extra##blast_##pfx##cache##lsize##_page_indexed(unsigned long page) \
@@ -620,13 +562,9 @@ static inline void extra##blast_##pfx##cache##lsize##_page_indexed(unsigned long
                               current_cpu_data.desc.waybit;            \
        unsigned long ws, addr;                                         \
                                                                        \
-       __##pfx##flush_prologue                                         \
-                                                                       \
        for (ws = 0; ws < ws_end; ws += ws_inc)                         \
                for (addr = start; addr < end; addr += lsize * 32)      \
                        cache##lsize##_unroll32(addr|ws, indexop);      \
-                                                                       \
-       __##pfx##flush_epilogue                                         \
 }
 
 __BUILD_BLAST_CACHE(d, dcache, Index_Writeback_Inv_D, Hit_Writeback_Inv_D, 16, )
@@ -656,14 +594,10 @@ static inline void blast_##pfx##cache##lsize##_user_page(unsigned long page) \
        unsigned long start = page;                                     \
        unsigned long end = page + PAGE_SIZE;                           \
                                                                        \
-       __##pfx##flush_prologue                                         \
-                                                                       \
        do {                                                            \
                cache##lsize##_unroll32_user(start, hitop);             \
                start += lsize * 32;                                    \
        } while (start < end);                                          \
-                                                                       \
-       __##pfx##flush_epilogue                                         \
 }
 
 __BUILD_BLAST_USER_CACHE(d, dcache, Index_Writeback_Inv_D, Hit_Writeback_Inv_D,
@@ -685,16 +619,12 @@ static inline void prot##extra##blast_##pfx##cache##_range(unsigned long start,
        unsigned long addr = start & ~(lsize - 1);                      \
        unsigned long aend = (end - 1) & ~(lsize - 1);                  \
                                                                        \
-       __##pfx##flush_prologue                                         \
-                                                                       \
        while (1) {                                                     \
                prot##cache_op(hitop, addr);                            \
                if (addr == aend)                                       \
                        break;                                          \
                addr += lsize;                                          \
        }                                                               \
-                                                                       \
-       __##pfx##flush_epilogue                                         \
 }
 
 #ifndef CONFIG_EVA
@@ -712,8 +642,6 @@ static inline void protected_blast_##pfx##cache##_range(unsigned long start,\
        unsigned long addr = start & ~(lsize - 1);                      \
        unsigned long aend = (end - 1) & ~(lsize - 1);                  \
                                                                        \
-       __##pfx##flush_prologue                                         \
-                                                                       \
        if (!uaccess_kernel()) {                                        \
                while (1) {                                             \
                        protected_cachee_op(hitop, addr);               \
@@ -730,7 +658,6 @@ static inline void protected_blast_##pfx##cache##_range(unsigned long start,\
                }                                                       \
                                                                        \
        }                                                               \
-       __##pfx##flush_epilogue                                         \
 }
 
 __BUILD_PROT_BLAST_CACHE_RANGE(d, dcache, Hit_Writeback_Inv_D)