ASIC_CALLIOPE,
ASIC_CRONUS,
ASIC_CRONUSLITE,
- ASICS
+ ASIC_GAIA,
+ ASICS /* Number of supported ASICs */
};
/* hardcoded values read from Chip Version registers */
#define NAND_FLASH_BASE 0x03000000
#define CALLIOPE_IO_BASE 0x08000000
+#define GAIA_IO_BASE 0x09000000
#define CRONUS_IO_BASE 0x09000000
#define ZEUS_IO_BASE 0x09000000
}
extern struct register_map _asic_register_map;
+extern unsigned long asic_phy_base;
/*
* Macros to interface to registers through their ioremapped address