Merge git://git.kernel.org/pub/scm/linux/kernel/git/brodo/pcmcia-2.6

[sfrench/cifs-2.6.git] / arch / mips / dec / time.c

diff --git a/arch/mips/dec/time.c b/arch/mips/dec/time.c
index 60349062595a9f5c0d420a75bab4faf3a9ace8d8..1359c03ded5111adb0892029b59ebffbd26eee7f 100644 (file)
--- a/arch/mips/dec/time.c
+++ b/arch/mips/dec/time.c
@@ -9,30 +9,15 @@
  *
  */
 #include <linux/bcd.h>
-#include <linux/errno.h>
 #include <linux/init.h>
-#include <linux/interrupt.h>
-#include <linux/kernel.h>
 #include <linux/mc146818rtc.h>
-#include <linux/mm.h>
-#include <linux/module.h>
 #include <linux/param.h>
-#include <linux/sched.h>
-#include <linux/string.h>
-#include <linux/time.h>
-#include <linux/types.h>
-
-#include <asm/bootinfo.h>
-#include <asm/cpu.h>
-#include <asm/io.h>
-#include <asm/irq.h>
-#include <asm/mipsregs.h>
-#include <asm/sections.h>
-#include <asm/time.h>
 
+#include <asm/cpu-features.h>
+#include <asm/ds1287.h>
+#include <asm/time.h>
 #include <asm/dec/interrupts.h>
 #include <asm/dec/ioasic.h>
-#include <asm/dec/ioasic_addrs.h>
 #include <asm/dec/machtype.h>
 
 unsigned long read_persistent_clock(void)
@@ -60,12 +45,12 @@ unsigned long read_persistent_clock(void)
        spin_unlock_irqrestore(&rtc_lock, flags);
 
        if (!(CMOS_READ(RTC_CONTROL) & RTC_DM_BINARY) || RTC_ALWAYS_BCD) {
-               sec = BCD2BIN(sec);
-               min = BCD2BIN(min);
-               hour = BCD2BIN(hour);
-               day = BCD2BIN(day);
-               mon = BCD2BIN(mon);
-               year = BCD2BIN(year);
+               sec = bcd2bin(sec);
+               min = bcd2bin(min);
+               hour = bcd2bin(hour);
+               day = bcd2bin(day);
+               mon = bcd2bin(mon);
+               year = bcd2bin(year);
        }
 
        year += real_year - 72 + 2000;
@@ -98,7 +83,7 @@ int rtc_mips_set_mmss(unsigned long nowtime)
 
        cmos_minutes = CMOS_READ(RTC_MINUTES);
        if (!(save_control & RTC_DM_BINARY) || RTC_ALWAYS_BCD)
-               cmos_minutes = BCD2BIN(cmos_minutes);
+               cmos_minutes = bcd2bin(cmos_minutes);
 
        /*
         * since we're only adjusting minutes and seconds,
@@ -114,8 +99,8 @@ int rtc_mips_set_mmss(unsigned long nowtime)
 
        if (abs(real_minutes - cmos_minutes) < 30) {
                if (!(save_control & RTC_DM_BINARY) || RTC_ALWAYS_BCD) {
-                       real_seconds = BIN2BCD(real_seconds);
-                       real_minutes = BIN2BCD(real_minutes);
+                       real_seconds = bin2bcd(real_seconds);
+                       real_minutes = bin2bcd(real_minutes);
                }
                CMOS_WRITE(real_seconds, RTC_SECONDS);
                CMOS_WRITE(real_minutes, RTC_MINUTES);
@@ -139,42 +124,32 @@ int rtc_mips_set_mmss(unsigned long nowtime)
        return retval;
 }
 
-static int dec_timer_state(void)
+void __init plat_time_init(void)
 {
-       return (CMOS_READ(RTC_REG_C) & RTC_PF) != 0;
-}
+       u32 start, end;
+       int i = HZ / 10;
 
-static void dec_timer_ack(void)
-{
-       CMOS_READ(RTC_REG_C);                   /* Ack the RTC interrupt.  */
-}
-
-static cycle_t dec_ioasic_hpt_read(void)
-{
-       /*
-        * The free-running counter is 32-bit which is good for about
-        * 2 minutes, 50 seconds at possible count rates of up to 25MHz.
-        */
-       return ioasic_read(IO_REG_FCTR);
-}
+       /* Set up the rate of periodic DS1287 interrupts. */
+       ds1287_set_base_clock(HZ);
 
+       if (cpu_has_counter) {
+               while (!ds1287_timer_state())
+                       ;
 
-void __init plat_time_init(void)
-{
-       mips_timer_ack = dec_timer_ack;
+               start = read_c0_count();
 
-       if (!cpu_has_counter && IOASIC)
-               /* For pre-R4k systems we use the I/O ASIC's counter.  */
-               clocksource_mips.read = dec_ioasic_hpt_read;
+               while (i--)
+                       while (!ds1287_timer_state())
+                               ;
 
-       /* Set up the rate of periodic DS1287 interrupts.  */
-       CMOS_WRITE(RTC_REF_CLCK_32KHZ | (16 - __ffs(HZ)), RTC_REG_A);
-}
+               end = read_c0_count();
 
-void __init plat_timer_setup(struct irqaction *irq)
-{
-       setup_irq(dec_interrupt[DEC_IRQ_RTC], irq);
+               mips_hpt_frequency = (end - start) * 10;
+               printk(KERN_INFO "MIPS counter frequency %dHz\n",
+                       mips_hpt_frequency);
+       } else if (IOASIC)
+               /* For pre-R4k systems we use the I/O ASIC's counter.  */
+               dec_ioasic_clocksource_init();
 
-       /* Enable periodic DS1287 interrupts.  */
-       CMOS_WRITE(CMOS_READ(RTC_REG_B) | RTC_PIE, RTC_REG_B);
+       ds1287_clockevent_init(dec_interrupt[DEC_IRQ_RTC]);
 }