Merge branch 'for-linus' of master.kernel.org:/home/rmk/linux-2.6-arm

[sfrench/cifs-2.6.git] / arch / mips / dec / kn02-irq.c

diff --git a/arch/mips/dec/kn02-irq.c b/arch/mips/dec/kn02-irq.c
index 04a367a60a5758126a6d6317cfe77add97ff984b..02439dc0ba83136209b0945a1cb77d39601e244b 100644 (file)
--- a/arch/mips/dec/kn02-irq.c
+++ b/arch/mips/dec/kn02-irq.c
@@ -14,7 +14,6 @@
 
 #include <linux/init.h>
 #include <linux/irq.h>
-#include <linux/spinlock.h>
 #include <linux/types.h>
 
 #include <asm/dec/kn02.h>
@@ -29,7 +28,6 @@
  * There is no default value -- it has to be initialized.
  */
 u32 cached_kn02_csr;
-DEFINE_SPINLOCK(kn02_lock);
 
 
 static int kn02_irq_base;
@@ -53,55 +51,18 @@ static inline void mask_kn02_irq(unsigned int irq)
        *csr = cached_kn02_csr;
 }
 
-static inline void enable_kn02_irq(unsigned int irq)
-{
-       unsigned long flags;
-
-       spin_lock_irqsave(&kn02_lock, flags);
-       unmask_kn02_irq(irq);
-       spin_unlock_irqrestore(&kn02_lock, flags);
-}
-
-static inline void disable_kn02_irq(unsigned int irq)
-{
-       unsigned long flags;
-
-       spin_lock_irqsave(&kn02_lock, flags);
-       mask_kn02_irq(irq);
-       spin_unlock_irqrestore(&kn02_lock, flags);
-}
-
-
-static unsigned int startup_kn02_irq(unsigned int irq)
-{
-       enable_kn02_irq(irq);
-       return 0;
-}
-
-#define shutdown_kn02_irq disable_kn02_irq
-
 static void ack_kn02_irq(unsigned int irq)
 {
-       spin_lock(&kn02_lock);
        mask_kn02_irq(irq);
-       spin_unlock(&kn02_lock);
        iob();
 }
 
-static void end_kn02_irq(unsigned int irq)
-{
-       if (!(irq_desc[irq].status & (IRQ_DISABLED | IRQ_INPROGRESS)))
-               enable_kn02_irq(irq);
-}
-
 static struct irq_chip kn02_irq_type = {
-       .typename = "KN02-CSR",
-       .startup = startup_kn02_irq,
-       .shutdown = shutdown_kn02_irq,
-       .enable = enable_kn02_irq,
-       .disable = disable_kn02_irq,
+       .name = "KN02-CSR",
        .ack = ack_kn02_irq,
-       .end = end_kn02_irq,
+       .mask = mask_kn02_irq,
+       .mask_ack = ack_kn02_irq,
+       .unmask = unmask_kn02_irq,
 };
 
 
@@ -109,22 +70,15 @@ void __init init_kn02_irqs(int base)
 {
        volatile u32 *csr = (volatile u32 *)CKSEG1ADDR(KN02_SLOT_BASE +
                                                       KN02_CSR);
-       unsigned long flags;
        int i;
 
        /* Mask interrupts. */
-       spin_lock_irqsave(&kn02_lock, flags);
        cached_kn02_csr &= ~KN02_CSR_IOINTEN;
        *csr = cached_kn02_csr;
        iob();
-       spin_unlock_irqrestore(&kn02_lock, flags);
-
-       for (i = base; i < base + KN02_IRQ_LINES; i++) {
-               irq_desc[i].status = IRQ_DISABLED;
-               irq_desc[i].action = 0;
-               irq_desc[i].depth = 1;
-               irq_desc[i].chip = &kn02_irq_type;
-       }
+
+       for (i = base; i < base + KN02_IRQ_LINES; i++)
+               set_irq_chip_and_handler(i, &kn02_irq_type, handle_level_irq);
 
        kn02_irq_base = base;
 }