MIPS: Octeon: HOTPLUG_CPU fixes.

[sfrench/cifs-2.6.git] / arch / mips / cavium-octeon / octeon_boot.h

diff --git a/arch/mips/cavium-octeon/octeon_boot.h b/arch/mips/cavium-octeon/octeon_boot.h
index 0f7f84accf9a88b9fec5ccd56172ba6f74cc14e9..428864b2ba4133070c563023f9c170346e24c4ca 100644 (file)
--- a/arch/mips/cavium-octeon/octeon_boot.h
+++ b/arch/mips/cavium-octeon/octeon_boot.h
@@ -23,14 +23,16 @@
 #include <linux/types.h>
 
 struct boot_init_vector {
-       uint32_t stack_addr;
-       uint32_t code_addr;
+       /* First stage address - in ram instead of flash */
+       uint64_t code_addr;
+       /* Setup code for application, NOT application entry point */
        uint32_t app_start_func_addr;
+       /* k0 is used for global data - needs to be passed to other cores */
        uint32_t k0_val;
-       uint32_t flags;
-       uint32_t boot_info_addr;
+       /* Address of boot info block structure */
+       uint64_t boot_info_addr;
+       uint32_t flags;         /* flags */
        uint32_t pad;
-       uint32_t pad2;
 };
 
 /* similar to bootloader's linux_app_boot_info but without global data */
@@ -40,7 +42,7 @@ struct linux_app_boot_info {
        uint32_t avail_coremask;
        uint32_t pci_console_active;
        uint32_t icache_prefetch_disable;
-       uint32_t InitTLBStart_addr;
+       uint64_t InitTLBStart_addr;
        uint32_t start_app_addr;
        uint32_t cur_exception_base;
        uint32_t no_mark_private_data;
@@ -58,7 +60,7 @@ struct linux_app_boot_info {
 
 #define LINUX_APP_BOOT_BLOCK_NAME "linux-app-boot"
 
-#define LABI_SIGNATURE 0xAABBCCDD
+#define LABI_SIGNATURE 0xAABBCC01
 
 /*  from uboot-headers/octeon_mem_map.h */
 #define EXCEPTION_BASE_INCR     (4 * 1024)