/***************************************************************************/
#include <linux/kernel.h>
-#include <linux/sched.h>
#include <linux/param.h>
#include <linux/init.h>
#include <linux/interrupt.h>
-#include <asm/dma.h>
-#include <asm/traps.h>
+#include <linux/platform_device.h>
+#include <linux/spi/spi.h>
+#include <linux/spi/flash.h>
+#include <linux/io.h>
#include <asm/machdep.h>
#include <asm/coldfire.h>
#include <asm/mcfsim.h>
-#include <asm/mcfdma.h>
+#include <asm/mcfuart.h>
+
+#ifdef CONFIG_MTD_PARTITIONS
+#include <linux/mtd/partitions.h>
+#endif
/***************************************************************************/
-void coldfire_pit_tick(void);
-void coldfire_pit_init(irq_handler_t handler);
-unsigned long coldfire_pit_offset(void);
void coldfire_reset(void);
/***************************************************************************/
-/*
- * DMA channel base address table.
- */
-unsigned int dma_base_addr[MAX_M68K_DMA_CHANNELS] = {
- MCF_MBAR + MCFDMA_BASE0,
+static struct mcf_platform_uart m528x_uart_platform[] = {
+ {
+ .mapbase = MCF_MBAR + MCFUART_BASE1,
+ .irq = MCFINT_VECBASE + MCFINT_UART0,
+ },
+ {
+ .mapbase = MCF_MBAR + MCFUART_BASE2,
+ .irq = MCFINT_VECBASE + MCFINT_UART0 + 1,
+ },
+ {
+ .mapbase = MCF_MBAR + MCFUART_BASE3,
+ .irq = MCFINT_VECBASE + MCFINT_UART0 + 2,
+ },
+ { },
+};
+
+static struct platform_device m528x_uart = {
+ .name = "mcfuart",
+ .id = 0,
+ .dev.platform_data = m528x_uart_platform,
};
-unsigned int dma_device_address[MAX_M68K_DMA_CHANNELS];
+static struct platform_device *m528x_devices[] __initdata = {
+ &m528x_uart,
+};
+
+/***************************************************************************/
+
+#define INTC0 (MCF_MBAR + MCFICM_INTC0)
+
+static void __init m528x_uart_init_line(int line, int irq)
+{
+ u8 port;
+ u32 imr;
+
+ if ((line < 0) || (line > 2))
+ return;
+
+ /* level 6, line based priority */
+ writeb(0x30+line, INTC0 + MCFINTC_ICR0 + MCFINT_UART0 + line);
+
+ imr = readl(INTC0 + MCFINTC_IMRL);
+ imr &= ~((1 << (irq - MCFINT_VECBASE)) | 1);
+ writel(imr, INTC0 + MCFINTC_IMRL);
+
+ /* make sure PUAPAR is set for UART0 and UART1 */
+ if (line < 2) {
+ port = readb(MCF_MBAR + MCF5282_GPIO_PUAPAR);
+ port |= (0x03 << (line * 2));
+ writeb(port, MCF_MBAR + MCF5282_GPIO_PUAPAR);
+ }
+}
+
+static void __init m528x_uarts_init(void)
+{
+ const int nrlines = ARRAY_SIZE(m528x_uart_platform);
+ int line;
+
+ for (line = 0; (line < nrlines); line++)
+ m528x_uart_init_line(line, m528x_uart_platform[line].irq);
+}
/***************************************************************************/
/***************************************************************************/
-void config_BSP(char *commandp, int size)
+#ifdef CONFIG_WILDFIRE
+void wildfire_halt(void)
+{
+ writeb(0, 0x30000007);
+ writeb(0x2, 0x30000007);
+}
+#endif
+
+#ifdef CONFIG_WILDFIREMOD
+void wildfiremod_halt(void)
+{
+ printk(KERN_INFO "WildFireMod hibernating...\n");
+
+ /* Set portE.5 to Digital IO */
+ MCF5282_GPIO_PEPAR &= ~(1 << (5 * 2));
+
+ /* Make portE.5 an output */
+ MCF5282_GPIO_DDRE |= (1 << 5);
+
+ /* Now toggle portE.5 from low to high */
+ MCF5282_GPIO_PORTE &= ~(1 << 5);
+ MCF5282_GPIO_PORTE |= (1 << 5);
+
+ printk(KERN_EMERG "Failed to hibernate. Halting!\n");
+}
+#endif
+
+void __init config_BSP(char *commandp, int size)
{
mcf_disableall();
- mach_sched_init = coldfire_pit_init;
- mach_tick = coldfire_pit_tick;
- mach_gettimeoffset = coldfire_pit_offset;
- mach_reset = coldfire_reset;
+
+#ifdef CONFIG_WILDFIRE
+ mach_halt = wildfire_halt;
+#endif
+#ifdef CONFIG_WILDFIREMOD
+ mach_halt = wildfiremod_halt;
+#endif
}
/***************************************************************************/
+
+static int __init init_BSP(void)
+{
+ m528x_uarts_init();
+ platform_add_devices(m528x_devices, ARRAY_SIZE(m528x_devices));
+ return 0;
+}
+
+arch_initcall(init_BSP);
+
+/***************************************************************************/