x86: early memtest to find bad ram
[sfrench/cifs-2.6.git] / arch / ia64 / kernel / cyclone.c
index e00b21514f7c665e97e1374d41c323ef915c1d57..790ef0d87e129f90b5cd83b617dc2b23000a7219 100644 (file)
@@ -3,6 +3,7 @@
 #include <linux/time.h>
 #include <linux/errno.h>
 #include <linux/timex.h>
+#include <linux/clocksource.h>
 #include <asm/io.h>
 
 /* IBM Summit (EXA) Cyclone counter code*/
@@ -18,22 +19,30 @@ void __init cyclone_setup(void)
        use_cyclone = 1;
 }
 
+static void __iomem *cyclone_mc;
 
-struct time_interpolator cyclone_interpolator = {
-       .source =       TIME_SOURCE_MMIO64,
-       .shift =        16,
-       .frequency =    CYCLONE_TIMER_FREQ,
-       .drift =        -100,
-       .mask =         (1LL << 40) - 1
+static cycle_t read_cyclone(void)
+{
+       return (cycle_t)readq((void __iomem *)cyclone_mc);
+}
+
+static struct clocksource clocksource_cyclone = {
+        .name           = "cyclone",
+        .rating         = 300,
+        .read           = read_cyclone,
+        .mask           = (1LL << 40) - 1,
+        .mult           = 0, /*to be caluclated*/
+        .shift          = 16,
+        .flags          = CLOCK_SOURCE_IS_CONTINUOUS,
 };
 
 int __init init_cyclone_clock(void)
 {
-       u64reg;
+       u64 __iomem *reg;
        u64 base;       /* saved cyclone base address */
        u64 offset;     /* offset from pageaddr to cyclone_timer register */
        int i;
-       u32* volatile cyclone_timer;    /* Cyclone MPMC0 register */
+       u32 __iomem *cyclone_timer;     /* Cyclone MPMC0 register */
 
        if (!use_cyclone)
                return 0;
@@ -42,15 +51,17 @@ int __init init_cyclone_clock(void)
 
        /* find base address */
        offset = (CYCLONE_CBAR_ADDR);
-       reg = (u64*)ioremap_nocache(offset, sizeof(u64));
+       reg = ioremap_nocache(offset, sizeof(u64));
        if(!reg){
-               printk(KERN_ERR "Summit chipset: Could not find valid CBAR register.\n");
+               printk(KERN_ERR "Summit chipset: Could not find valid CBAR"
+                               " register.\n");
                use_cyclone = 0;
                return -ENODEV;
        }
        base = readq(reg);
        if(!base){
-               printk(KERN_ERR "Summit chipset: Could not find valid CBAR value.\n");
+               printk(KERN_ERR "Summit chipset: Could not find valid CBAR"
+                               " value.\n");
                use_cyclone = 0;
                return -ENODEV;
        }
@@ -58,9 +69,10 @@ int __init init_cyclone_clock(void)
 
        /* setup PMCC */
        offset = (base + CYCLONE_PMCC_OFFSET);
-       reg = (u64*)ioremap_nocache(offset, sizeof(u64));
+       reg = ioremap_nocache(offset, sizeof(u64));
        if(!reg){
-               printk(KERN_ERR "Summit chipset: Could not find valid PMCC register.\n");
+               printk(KERN_ERR "Summit chipset: Could not find valid PMCC"
+                               " register.\n");
                use_cyclone = 0;
                return -ENODEV;
        }
@@ -69,9 +81,10 @@ int __init init_cyclone_clock(void)
 
        /* setup MPCS */
        offset = (base + CYCLONE_MPCS_OFFSET);
-       reg = (u64*)ioremap_nocache(offset, sizeof(u64));
+       reg = ioremap_nocache(offset, sizeof(u64));
        if(!reg){
-               printk(KERN_ERR "Summit chipset: Could not find valid MPCS register.\n");
+               printk(KERN_ERR "Summit chipset: Could not find valid MPCS"
+                               " register.\n");
                use_cyclone = 0;
                return -ENODEV;
        }
@@ -80,9 +93,10 @@ int __init init_cyclone_clock(void)
 
        /* map in cyclone_timer */
        offset = (base + CYCLONE_MPMC_OFFSET);
-       cyclone_timer = (u32*)ioremap_nocache(offset, sizeof(u32));
+       cyclone_timer = ioremap_nocache(offset, sizeof(u32));
        if(!cyclone_timer){
-               printk(KERN_ERR "Summit chipset: Could not find valid MPMC register.\n");
+               printk(KERN_ERR "Summit chipset: Could not find valid MPMC"
+                               " register.\n");
                use_cyclone = 0;
                return -ENODEV;
        }
@@ -93,16 +107,20 @@ int __init init_cyclone_clock(void)
                int stall = 100;
                while(stall--) barrier();
                if(readl(cyclone_timer) == old){
-                       printk(KERN_ERR "Summit chipset: Counter not counting! DISABLED\n");
+                       printk(KERN_ERR "Summit chipset: Counter not counting!"
+                                       " DISABLED\n");
                        iounmap(cyclone_timer);
-                       cyclone_timer = 0;
+                       cyclone_timer = NULL;
                        use_cyclone = 0;
                        return -ENODEV;
                }
        }
        /* initialize last tick */
-       cyclone_interpolator.addr = cyclone_timer;
-       register_time_interpolator(&cyclone_interpolator);
+       cyclone_mc = cyclone_timer;
+       clocksource_cyclone.fsys_mmio = cyclone_timer;
+       clocksource_cyclone.mult = clocksource_hz2mult(CYCLONE_TIMER_FREQ,
+                                               clocksource_cyclone.shift);
+       clocksource_register(&clocksource_cyclone);
 
        return 0;
 }