Pull acpica into test branch

[sfrench/cifs-2.6.git] / arch / i386 / pci / mmconfig.c

diff --git a/arch/i386/pci/mmconfig.c b/arch/i386/pci/mmconfig.c
index 05be8db58a8cee783bde63b5f207d7e8137fd7fc..5700220dcf5fa15a4c0984128ce0c8e95735bd60 100644 (file)
--- a/arch/i386/pci/mmconfig.c
+++ b/arch/i386/pci/mmconfig.c
@@ -26,6 +26,7 @@
 
 /* The base address of the last MMCONFIG device accessed */
 static u32 mmcfg_last_accessed_device;
+static int mmcfg_last_accessed_cpu;
 
 static DECLARE_BITMAP(fallback_slots, MAX_CHECK_BUS*32);
 
@@ -35,7 +36,7 @@ static DECLARE_BITMAP(fallback_slots, MAX_CHECK_BUS*32);
 static u32 get_base_addr(unsigned int seg, int bus, unsigned devfn)
 {
        int cfg_num = -1;
-       struct acpi_table_mcfg_config *cfg;
+       struct acpi_mcfg_allocation *cfg;
 
        if (seg == 0 && bus < MAX_CHECK_BUS &&
            test_bit(PCI_SLOT(devfn) + 32*bus, fallback_slots))
@@ -47,11 +48,11 @@ static u32 get_base_addr(unsigned int seg, int bus, unsigned devfn)
                        break;
                }
                cfg = &pci_mmcfg_config[cfg_num];
-               if (cfg->pci_segment_group_number != seg)
+               if (cfg->pci_segment != seg)
                        continue;
                if ((cfg->start_bus_number <= bus) &&
                    (cfg->end_bus_number >= bus))
-                       return cfg->base_address;
+                       return cfg->address;
        }
 
        /* Handle more broken MCFG tables on Asus etc.
@@ -59,19 +60,25 @@ static u32 get_base_addr(unsigned int seg, int bus, unsigned devfn)
           this applies to all busses. */
        cfg = &pci_mmcfg_config[0];
        if (pci_mmcfg_config_num == 1 &&
-               cfg->pci_segment_group_number == 0 &&
+               cfg->pci_segment == 0 &&
                (cfg->start_bus_number | cfg->end_bus_number) == 0)
-               return cfg->base_address;
+               return cfg->address;
 
        /* Fall back to type 0 */
        return 0;
 }
 
-static inline void pci_exp_set_dev_base(unsigned int base, int bus, int devfn)
+/*
+ * This is always called under pci_config_lock
+ */
+static void pci_exp_set_dev_base(unsigned int base, int bus, int devfn)
 {
        u32 dev_base = base | (bus << 20) | (devfn << 12);
-       if (dev_base != mmcfg_last_accessed_device) {
+       int cpu = smp_processor_id();
+       if (dev_base != mmcfg_last_accessed_device ||
+           cpu != mmcfg_last_accessed_cpu) {
                mmcfg_last_accessed_device = dev_base;
+               mmcfg_last_accessed_cpu = cpu;
                set_fixmap_nocache(FIX_PCIE_MCFG, dev_base);
        }
 }
@@ -118,7 +125,7 @@ static int pci_mmcfg_write(unsigned int seg, unsigned int bus,
        unsigned long flags;
        u32 base;
 
-       if ((bus > 255) || (devfn > 255) || (reg > 4095)) 
+       if ((bus > 255) || (devfn > 255) || (reg > 4095))
                return -EINVAL;
 
        base = get_base_addr(seg, bus, devfn);
@@ -151,38 +158,6 @@ static struct pci_raw_ops pci_mmcfg = {
        .write =        pci_mmcfg_write,
 };
 
-
-static __init void pci_mmcfg_insert_resources(void)
-{
-#define PCI_MMCFG_RESOURCE_NAME_LEN 19
-       int i;
-       struct resource *res;
-       char *names;
-       unsigned num_buses;
-
-       res = kcalloc(PCI_MMCFG_RESOURCE_NAME_LEN + sizeof(*res),
-                       pci_mmcfg_config_num, GFP_KERNEL);
-
-       if (!res) {
-               printk(KERN_ERR "PCI: Unable to allocate MMCONFIG resources\n");
-               return;
-       }
-
-       names = (void *)&res[pci_mmcfg_config_num];
-       for (i = 0; i < pci_mmcfg_config_num; i++, res++) {
-               num_buses = pci_mmcfg_config[i].end_bus_number -
-                   pci_mmcfg_config[i].start_bus_number + 1;
-               res->name = names;
-               snprintf(names, PCI_MMCFG_RESOURCE_NAME_LEN, "PCI MMCONFIG %u",
-                       pci_mmcfg_config[i].pci_segment_group_number);
-               res->start = pci_mmcfg_config[i].base_address;
-               res->end = res->start + (num_buses << 20) - 1;
-               res->flags = IORESOURCE_MEM | IORESOURCE_BUSY;
-               insert_resource(&iomem_resource, res);
-               names += PCI_MMCFG_RESOURCE_NAME_LEN;
-       }
-}
-
 /* K8 systems have some devices (typically in the builtin northbridge)
    that are only accessible using type1
    Normally this can be expressed in the MCFG by not listing them
@@ -219,26 +194,24 @@ static __init void unreachable_devices(void)
        }
 }
 
-
-
 void __init pci_mmcfg_init(int type)
 {
        if ((pci_probe & PCI_PROBE_MMCONF) == 0)
                return;
 
-       acpi_table_parse(ACPI_MCFG, acpi_parse_mcfg);
+       acpi_table_parse(ACPI_SIG_MCFG, acpi_parse_mcfg);
        if ((pci_mmcfg_config_num == 0) ||
            (pci_mmcfg_config == NULL) ||
-           (pci_mmcfg_config[0].base_address == 0))
+           (pci_mmcfg_config[0].address == 0))
                return;
 
        /* Only do this check when type 1 works. If it doesn't work
           assume we run on a Mac and always use MCFG */
-       if (type == 1 && !e820_all_mapped(pci_mmcfg_config[0].base_address,
-                       pci_mmcfg_config[0].base_address + MMCONFIG_APER_MIN,
+       if (type == 1 && !e820_all_mapped(pci_mmcfg_config[0].address,
+                       pci_mmcfg_config[0].address + MMCONFIG_APER_MIN,
                        E820_RESERVED)) {
-               printk(KERN_ERR "PCI: BIOS Bug: MCFG area at %x is not E820-reserved\n",
-                               pci_mmcfg_config[0].base_address);
+               printk(KERN_ERR "PCI: BIOS Bug: MCFG area at %lx is not E820-reserved\n",
+                               (unsigned long)pci_mmcfg_config[0].address);
                printk(KERN_ERR "PCI: Not using MMCONFIG.\n");
                return;
        }
@@ -248,5 +221,4 @@ void __init pci_mmcfg_init(int type)
        pci_probe = (pci_probe & ~PCI_PROBE_MASK) | PCI_PROBE_MMCONF;
 
        unreachable_devices();
-       pci_mmcfg_insert_resources();
 }