[PATCH] i386: need to pass virtual address to smp_read_mpc()

[sfrench/cifs-2.6.git] / arch / i386 / kernel / mpparse.c

diff --git a/arch/i386/kernel/mpparse.c b/arch/i386/kernel/mpparse.c
index 8f767d9aa45d73286af9f8a8a92b2fe901b33608..e7609abf3796354e3b5ee03e9e8de28c81679a6f 100644 (file)
--- a/arch/i386/kernel/mpparse.c
+++ b/arch/i386/kernel/mpparse.c
@@ -38,6 +38,12 @@
 int smp_found_config;
 unsigned int __initdata maxcpus = NR_CPUS;
 
+#ifdef CONFIG_HOTPLUG_CPU
+#define CPU_HOTPLUG_ENABLED    (1)
+#else
+#define CPU_HOTPLUG_ENABLED    (0)
+#endif
+
 /*
  * Various Linux-internal data structures created from the
  * MP-table.
@@ -219,13 +225,18 @@ static void __devinit MP_processor_info (struct mpc_config_processor *m)
        cpu_set(num_processors, cpu_possible_map);
        num_processors++;
 
-       if ((num_processors > 8) &&
-           APIC_XAPIC(ver) &&
-           (boot_cpu_data.x86_vendor == X86_VENDOR_INTEL))
-               def_to_bigsmp = 1;
-       else
-               def_to_bigsmp = 0;
-
+       if (CPU_HOTPLUG_ENABLED || (num_processors > 8)) {
+               switch (boot_cpu_data.x86_vendor) {
+               case X86_VENDOR_INTEL:
+                       if (!APIC_XAPIC(ver)) {
+                               def_to_bigsmp = 0;
+                               break;
+                       }
+                       /* If P4 and above fall through */
+               case X86_VENDOR_AMD:
+                       def_to_bigsmp = 1;
+               }
+       }
        bios_cpu_apicid[num_processors - 1] = m->mpc_apicid;
 }
 
@@ -699,7 +710,7 @@ void __init get_smp_config (void)
                 * Read the physical hardware table.  Anything here will
                 * override the defaults.
                 */
-               if (!smp_read_mpc((void *)mpf->mpf_physptr)) {
+               if (!smp_read_mpc(phys_to_virt(mpf->mpf_physptr))) {
                        smp_found_config = 0;
                        printk(KERN_ERR "BIOS bug, MP table errors detected!...\n");
                        printk(KERN_ERR "... disabling SMP support. (tell your hw vendor)\n");
@@ -1069,7 +1080,7 @@ void __init mp_config_acpi_legacy_irqs (void)
 
 #define MAX_GSI_NUM    4096
 
-int mp_register_gsi (u32 gsi, int edge_level, int active_high_low)
+int mp_register_gsi (u32 gsi, int triggering, int polarity)
 {
        int                     ioapic = -1;
        int                     ioapic_pin = 0;
@@ -1118,7 +1129,7 @@ int mp_register_gsi (u32 gsi, int edge_level, int active_high_low)
 
        mp_ioapic_routing[ioapic].pin_programmed[idx] |= (1<<bit);
 
-       if (edge_level) {
+       if (triggering == ACPI_LEVEL_SENSITIVE) {
                /*
                 * For PCI devices assign IRQs in order, avoiding gaps
                 * due to unused I/O APIC pins.
@@ -1140,8 +1151,8 @@ int mp_register_gsi (u32 gsi, int edge_level, int active_high_low)
        }
 
        io_apic_set_pci_routing(ioapic, ioapic_pin, gsi,
-                   edge_level == ACPI_EDGE_SENSITIVE ? 0 : 1,
-                   active_high_low == ACPI_ACTIVE_HIGH ? 0 : 1);
+                   triggering == ACPI_EDGE_SENSITIVE ? 0 : 1,
+                   polarity == ACPI_ACTIVE_HIGH ? 0 : 1);
        return gsi;
 }