Merge master.kernel.org:/pub/scm/linux/kernel/git/kyle/parisc-2.6

[sfrench/cifs-2.6.git] / arch / i386 / kernel / cpu / amd.c

diff --git a/arch/i386/kernel/cpu/amd.c b/arch/i386/kernel/cpu/amd.c
index 0810f81f2a05d154cf0bc8bcd4885129eef831d8..e6a2d6b80cdae8a84e72566da1642bff59a7dc7a 100644 (file)
--- a/arch/i386/kernel/cpu/amd.c
+++ b/arch/i386/kernel/cpu/amd.c
@@ -207,13 +207,13 @@ static void __init init_amd(struct cpuinfo_x86 *c)
                set_bit(X86_FEATURE_K7, c->x86_capability); 
                break;
        }
+       if (c->x86 >= 6)
+               set_bit(X86_FEATURE_FXSAVE_LEAK, c->x86_capability);
 
        display_cacheinfo(c);
 
        if (cpuid_eax(0x80000000) >= 0x80000008) {
                c->x86_max_cores = (cpuid_ecx(0x80000008) & 0xff) + 1;
-               if (c->x86_max_cores & (c->x86_max_cores - 1))
-                       c->x86_max_cores = 1;
        }
 
        if (cpuid_eax(0x80000000) >= 0x80000007) {
@@ -224,22 +224,26 @@ static void __init init_amd(struct cpuinfo_x86 *c)
 
 #ifdef CONFIG_X86_HT
        /*
-        * On a AMD dual core setup the lower bits of the APIC id
-        * distingush the cores.  Assumes number of cores is a power
-        * of two.
+        * On a AMD multi core setup the lower bits of the APIC id
+        * distingush the cores.
         */
        if (c->x86_max_cores > 1) {
                int cpu = smp_processor_id();
-               unsigned bits = 0;
-               while ((1 << bits) < c->x86_max_cores)
-                       bits++;
-               cpu_core_id[cpu] = phys_proc_id[cpu] & ((1<<bits)-1);
-               phys_proc_id[cpu] >>= bits;
+               unsigned bits = (cpuid_ecx(0x80000008) >> 12) & 0xf;
+
+               if (bits == 0) {
+                       while ((1 << bits) < c->x86_max_cores)
+                               bits++;
+               }
+               c->cpu_core_id = c->phys_proc_id & ((1<<bits)-1);
+               c->phys_proc_id >>= bits;
                printk(KERN_INFO "CPU %d(%d) -> Core %d\n",
-                      cpu, c->x86_max_cores, cpu_core_id[cpu]);
+                      cpu, c->x86_max_cores, c->cpu_core_id);
        }
 #endif
 
+       if (cpuid_eax(0x80000000) >= 0x80000006)
+               num_cache_leaves = 3;
 }
 
 static unsigned int amd_size_cache(struct cpuinfo_x86 * c, unsigned int size)