csky: Fixup csky_pmu.max_period assignment
[sfrench/cifs-2.6.git] / arch / csky / kernel / perf_event.c
index 7873306dec89ce48d5f09beba6b038d70058a4fa..7570109cddc6a6455dd282b774a5095fedf5a597 100644 (file)
@@ -728,6 +728,20 @@ static const int csky_pmu_hw_map[PERF_COUNT_HW_MAX] = {
 #define CACHE_OP_UNSUPPORTED   0xffff
 static const int csky_pmu_cache_map[C(MAX)][C(OP_MAX)][C(RESULT_MAX)] = {
        [C(L1D)] = {
+#ifdef CONFIG_CPU_CK810
+               [C(OP_READ)] = {
+                       [C(RESULT_ACCESS)]      = CACHE_OP_UNSUPPORTED,
+                       [C(RESULT_MISS)]        = CACHE_OP_UNSUPPORTED,
+               },
+               [C(OP_WRITE)] = {
+                       [C(RESULT_ACCESS)]      = CACHE_OP_UNSUPPORTED,
+                       [C(RESULT_MISS)]        = CACHE_OP_UNSUPPORTED,
+               },
+               [C(OP_PREFETCH)] = {
+                       [C(RESULT_ACCESS)]      = 0x5,
+                       [C(RESULT_MISS)]        = 0x6,
+               },
+#else
                [C(OP_READ)] = {
                        [C(RESULT_ACCESS)]      = 0x14,
                        [C(RESULT_MISS)]        = 0x15,
@@ -737,9 +751,10 @@ static const int csky_pmu_cache_map[C(MAX)][C(OP_MAX)][C(RESULT_MAX)] = {
                        [C(RESULT_MISS)]        = 0x17,
                },
                [C(OP_PREFETCH)] = {
-                       [C(RESULT_ACCESS)]      = 0x5,
-                       [C(RESULT_MISS)]        = 0x6,
+                       [C(RESULT_ACCESS)]      = CACHE_OP_UNSUPPORTED,
+                       [C(RESULT_MISS)]        = CACHE_OP_UNSUPPORTED,
                },
+#endif
        },
        [C(L1I)] = {
                [C(OP_READ)] = {
@@ -756,6 +771,20 @@ static const int csky_pmu_cache_map[C(MAX)][C(OP_MAX)][C(RESULT_MAX)] = {
                },
        },
        [C(LL)] = {
+#ifdef CONFIG_CPU_CK810
+               [C(OP_READ)] = {
+                       [C(RESULT_ACCESS)]      = CACHE_OP_UNSUPPORTED,
+                       [C(RESULT_MISS)]        = CACHE_OP_UNSUPPORTED,
+               },
+               [C(OP_WRITE)] = {
+                       [C(RESULT_ACCESS)]      = CACHE_OP_UNSUPPORTED,
+                       [C(RESULT_MISS)]        = CACHE_OP_UNSUPPORTED,
+               },
+               [C(OP_PREFETCH)] = {
+                       [C(RESULT_ACCESS)]      = 0x7,
+                       [C(RESULT_MISS)]        = 0x8,
+               },
+#else
                [C(OP_READ)] = {
                        [C(RESULT_ACCESS)]      = 0x18,
                        [C(RESULT_MISS)]        = 0x19,
@@ -765,29 +794,48 @@ static const int csky_pmu_cache_map[C(MAX)][C(OP_MAX)][C(RESULT_MAX)] = {
                        [C(RESULT_MISS)]        = 0x1b,
                },
                [C(OP_PREFETCH)] = {
-                       [C(RESULT_ACCESS)]      = 0x7,
-                       [C(RESULT_MISS)]        = 0x8,
+                       [C(RESULT_ACCESS)]      = CACHE_OP_UNSUPPORTED,
+                       [C(RESULT_MISS)]        = CACHE_OP_UNSUPPORTED,
                },
+#endif
        },
        [C(DTLB)] = {
+#ifdef CONFIG_CPU_CK810
                [C(OP_READ)] = {
-                       [C(RESULT_ACCESS)]      = 0x5,
-                       [C(RESULT_MISS)]        = 0xb,
+                       [C(RESULT_ACCESS)]      = CACHE_OP_UNSUPPORTED,
+                       [C(RESULT_MISS)]        = CACHE_OP_UNSUPPORTED,
                },
                [C(OP_WRITE)] = {
                        [C(RESULT_ACCESS)]      = CACHE_OP_UNSUPPORTED,
                        [C(RESULT_MISS)]        = CACHE_OP_UNSUPPORTED,
                },
+#else
+               [C(OP_READ)] = {
+                       [C(RESULT_ACCESS)]      = 0x14,
+                       [C(RESULT_MISS)]        = 0xb,
+               },
+               [C(OP_WRITE)] = {
+                       [C(RESULT_ACCESS)]      = 0x16,
+                       [C(RESULT_MISS)]        = 0xb,
+               },
+#endif
                [C(OP_PREFETCH)] = {
                        [C(RESULT_ACCESS)]      = CACHE_OP_UNSUPPORTED,
                        [C(RESULT_MISS)]        = CACHE_OP_UNSUPPORTED,
                },
        },
        [C(ITLB)] = {
+#ifdef CONFIG_CPU_CK810
+               [C(OP_READ)] = {
+                       [C(RESULT_ACCESS)]      = CACHE_OP_UNSUPPORTED,
+                       [C(RESULT_MISS)]        = CACHE_OP_UNSUPPORTED,
+               },
+#else
                [C(OP_READ)] = {
                        [C(RESULT_ACCESS)]      = 0x3,
                        [C(RESULT_MISS)]        = 0xa,
                },
+#endif
                [C(OP_WRITE)] = {
                        [C(RESULT_ACCESS)]      = CACHE_OP_UNSUPPORTED,
                        [C(RESULT_MISS)]        = CACHE_OP_UNSUPPORTED,
@@ -922,15 +970,6 @@ static int csky_pmu_event_init(struct perf_event *event)
        struct hw_perf_event *hwc = &event->hw;
        int ret;
 
-       if (event->attr.exclude_user)
-               csky_pmu.hpcr = BIT(2);
-       else if (event->attr.exclude_kernel)
-               csky_pmu.hpcr = BIT(3);
-       else
-               csky_pmu.hpcr = BIT(2) | BIT(3);
-
-       csky_pmu.hpcr |= BIT(1) | BIT(0);
-
        switch (event->attr.type) {
        case PERF_TYPE_HARDWARE:
                if (event->attr.config >= PERF_COUNT_HW_MAX)
@@ -939,21 +978,32 @@ static int csky_pmu_event_init(struct perf_event *event)
                if (ret == HW_OP_UNSUPPORTED)
                        return -ENOENT;
                hwc->idx = ret;
-               return 0;
+               break;
        case PERF_TYPE_HW_CACHE:
                ret = csky_pmu_cache_event(event->attr.config);
                if (ret == CACHE_OP_UNSUPPORTED)
                        return -ENOENT;
                hwc->idx = ret;
-               return 0;
+               break;
        case PERF_TYPE_RAW:
                if (hw_raw_read_mapping[event->attr.config] == NULL)
                        return -ENOENT;
                hwc->idx = event->attr.config;
-               return 0;
+               break;
        default:
                return -ENOENT;
        }
+
+       if (event->attr.exclude_user)
+               csky_pmu.hpcr = BIT(2);
+       else if (event->attr.exclude_kernel)
+               csky_pmu.hpcr = BIT(3);
+       else
+               csky_pmu.hpcr = BIT(2) | BIT(3);
+
+       csky_pmu.hpcr |= BIT(1) | BIT(0);
+
+       return 0;
 }
 
 /* starts all counters */
@@ -1256,7 +1306,7 @@ int csky_pmu_device_probe(struct platform_device *pdev,
                                 &csky_pmu.count_width)) {
                csky_pmu.count_width = DEFAULT_COUNT_WIDTH;
        }
-       csky_pmu.max_period = BIT(csky_pmu.count_width) - 1;
+       csky_pmu.max_period = BIT_ULL(csky_pmu.count_width) - 1;
 
        csky_pmu.plat_device = pdev;