menu "BF561 Specific Configuration"
-comment "Core B Support"
+if (!SMP)
-menu "Core B Support"
+comment "Core B Support"
config BF561_COREB
bool "Enable Core B support"
0 is set, and will reset PC to 0xff600000 when
COREB_SRAM_INIT is cleared.
-endmenu
+endif
comment "Interrupt Priority Assignment"
default 9
config IRQ_TIMER0
int "TIMER 0 Interrupt"
- default 10
+ default 8
config IRQ_TIMER1
int "TIMER 1 Interrupt"
default 10