Merge tag 'dmaengine-4.14-rc1' of git://git.infradead.org/users/vkoul/slave-dma

[sfrench/cifs-2.6.git] / arch / arm64 / kernel / head.S

diff --git a/arch/arm64/kernel/head.S b/arch/arm64/kernel/head.S
index adb0910b88f5f26c1562a7fef6f00f29ee9ec391..7434ec0c7a271632adce1a497bc097306199e580 100644 (file)
--- a/arch/arm64/kernel/head.S
+++ b/arch/arm64/kernel/head.S
@@ -143,8 +143,8 @@ preserve_boot_args:
        dmb     sy                              // needed before dc ivac with
                                                // MMU off
 
-       add     x1, x0, #0x20                   // 4 x 8 bytes
-       b       __inval_cache_range             // tail call
+       mov     x1, #0x20                       // 4 x 8 bytes
+       b       __inval_dcache_area             // tail call
 ENDPROC(preserve_boot_args)
 
 /*
@@ -221,20 +221,20 @@ __create_page_tables:
         * dirty cache lines being evicted.
         */
        adrp    x0, idmap_pg_dir
-       adrp    x1, swapper_pg_dir + SWAPPER_DIR_SIZE + RESERVED_TTBR0_SIZE
-       bl      __inval_cache_range
+       ldr     x1, =(IDMAP_DIR_SIZE + SWAPPER_DIR_SIZE + RESERVED_TTBR0_SIZE)
+       bl      __inval_dcache_area
 
        /*
         * Clear the idmap and swapper page tables.
         */
        adrp    x0, idmap_pg_dir
-       adrp    x6, swapper_pg_dir + SWAPPER_DIR_SIZE + RESERVED_TTBR0_SIZE
+       ldr     x1, =(IDMAP_DIR_SIZE + SWAPPER_DIR_SIZE + RESERVED_TTBR0_SIZE)
 1:     stp     xzr, xzr, [x0], #16
        stp     xzr, xzr, [x0], #16
        stp     xzr, xzr, [x0], #16
        stp     xzr, xzr, [x0], #16
-       cmp     x0, x6
-       b.lo    1b
+       subs    x1, x1, #64
+       b.ne    1b
 
        mov     x7, SWAPPER_MM_MMUFLAGS
 
@@ -307,9 +307,9 @@ __create_page_tables:
         * tables again to remove any speculatively loaded cache lines.
         */
        adrp    x0, idmap_pg_dir
-       adrp    x1, swapper_pg_dir + SWAPPER_DIR_SIZE + RESERVED_TTBR0_SIZE
+       ldr     x1, =(IDMAP_DIR_SIZE + SWAPPER_DIR_SIZE + RESERVED_TTBR0_SIZE)
        dmb     sy
-       bl      __inval_cache_range
+       bl      __inval_dcache_area
 
        ret     x28
 ENDPROC(__create_page_tables)
@@ -361,6 +361,9 @@ __primary_switched:
        ret                                     // to __primary_switch()
 0:
 #endif
+       add     sp, sp, #16
+       mov     x29, #0
+       mov     x30, #0
        b       start_kernel
 ENDPROC(__primary_switched)
 
@@ -616,6 +619,7 @@ __secondary_switched:
        ldr     x2, [x0, #CPU_BOOT_TASK]
        msr     sp_el0, x2
        mov     x29, #0
+       mov     x30, #0
        b       secondary_start_kernel
 ENDPROC(__secondary_switched)