Merge branch 'locking-core-for-linus' of git://git.kernel.org/pub/scm/linux/kernel...

[sfrench/cifs-2.6.git] / arch / arm64 / boot / dts / renesas / r8a7795.dtsi

diff --git a/arch/arm64/boot/dts/renesas/r8a7795.dtsi b/arch/arm64/boot/dts/renesas/r8a7795.dtsi
index 1745ac4b307eb0eee9240edbad08e52a8b6861ea..95deff66eeb6111e2cdc5de8b957ee586d841b46 100644 (file)
--- a/arch/arm64/boot/dts/renesas/r8a7795.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a7795.dtsi
@@ -2731,6 +2731,83 @@
                        resets = <&cpg 820>;
                };
 
+               vspbc: vsp@fe920000 {
+                       compatible = "renesas,vsp2";
+                       reg = <0 0xfe920000 0 0x8000>;
+                       interrupts = <GIC_SPI 465 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&cpg CPG_MOD 624>;
+                       power-domains = <&sysc R8A7795_PD_A3VP>;
+                       resets = <&cpg 624>;
+
+                       renesas,fcp = <&fcpvb1>;
+               };
+
+               vspbd: vsp@fe960000 {
+                       compatible = "renesas,vsp2";
+                       reg = <0 0xfe960000 0 0x8000>;
+                       interrupts = <GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&cpg CPG_MOD 626>;
+                       power-domains = <&sysc R8A7795_PD_A3VP>;
+                       resets = <&cpg 626>;
+
+                       renesas,fcp = <&fcpvb0>;
+               };
+
+               vspd0: vsp@fea20000 {
+                       compatible = "renesas,vsp2";
+                       reg = <0 0xfea20000 0 0x5000>;
+                       interrupts = <GIC_SPI 466 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&cpg CPG_MOD 623>;
+                       power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
+                       resets = <&cpg 623>;
+
+                       renesas,fcp = <&fcpvd0>;
+               };
+
+               vspd1: vsp@fea28000 {
+                       compatible = "renesas,vsp2";
+                       reg = <0 0xfea28000 0 0x5000>;
+                       interrupts = <GIC_SPI 467 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&cpg CPG_MOD 622>;
+                       power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
+                       resets = <&cpg 622>;
+
+                       renesas,fcp = <&fcpvd1>;
+               };
+
+               vspd2: vsp@fea30000 {
+                       compatible = "renesas,vsp2";
+                       reg = <0 0xfea30000 0 0x5000>;
+                       interrupts = <GIC_SPI 468 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&cpg CPG_MOD 621>;
+                       power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
+                       resets = <&cpg 621>;
+
+                       renesas,fcp = <&fcpvd2>;
+               };
+
+               vspi0: vsp@fe9a0000 {
+                       compatible = "renesas,vsp2";
+                       reg = <0 0xfe9a0000 0 0x8000>;
+                       interrupts = <GIC_SPI 444 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&cpg CPG_MOD 631>;
+                       power-domains = <&sysc R8A7795_PD_A3VP>;
+                       resets = <&cpg 631>;
+
+                       renesas,fcp = <&fcpvi0>;
+               };
+
+               vspi1: vsp@fe9b0000 {
+                       compatible = "renesas,vsp2";
+                       reg = <0 0xfe9b0000 0 0x8000>;
+                       interrupts = <GIC_SPI 445 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&cpg CPG_MOD 630>;
+                       power-domains = <&sysc R8A7795_PD_A3VP>;
+                       resets = <&cpg 630>;
+
+                       renesas,fcp = <&fcpvi1>;
+               };
+
                fdp1@fe940000 {
                        compatible = "renesas,fdp1";
                        reg = <0 0xfe940000 0 0x2400>;
@@ -2832,83 +2909,6 @@
                        iommus = <&ipmmu_vi1 10>;
                };
 
-               vspbd: vsp@fe960000 {
-                       compatible = "renesas,vsp2";
-                       reg = <0 0xfe960000 0 0x8000>;
-                       interrupts = <GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>;
-                       clocks = <&cpg CPG_MOD 626>;
-                       power-domains = <&sysc R8A7795_PD_A3VP>;
-                       resets = <&cpg 626>;
-
-                       renesas,fcp = <&fcpvb0>;
-               };
-
-               vspbc: vsp@fe920000 {
-                       compatible = "renesas,vsp2";
-                       reg = <0 0xfe920000 0 0x8000>;
-                       interrupts = <GIC_SPI 465 IRQ_TYPE_LEVEL_HIGH>;
-                       clocks = <&cpg CPG_MOD 624>;
-                       power-domains = <&sysc R8A7795_PD_A3VP>;
-                       resets = <&cpg 624>;
-
-                       renesas,fcp = <&fcpvb1>;
-               };
-
-               vspd0: vsp@fea20000 {
-                       compatible = "renesas,vsp2";
-                       reg = <0 0xfea20000 0 0x5000>;
-                       interrupts = <GIC_SPI 466 IRQ_TYPE_LEVEL_HIGH>;
-                       clocks = <&cpg CPG_MOD 623>;
-                       power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
-                       resets = <&cpg 623>;
-
-                       renesas,fcp = <&fcpvd0>;
-               };
-
-               vspd1: vsp@fea28000 {
-                       compatible = "renesas,vsp2";
-                       reg = <0 0xfea28000 0 0x5000>;
-                       interrupts = <GIC_SPI 467 IRQ_TYPE_LEVEL_HIGH>;
-                       clocks = <&cpg CPG_MOD 622>;
-                       power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
-                       resets = <&cpg 622>;
-
-                       renesas,fcp = <&fcpvd1>;
-               };
-
-               vspd2: vsp@fea30000 {
-                       compatible = "renesas,vsp2";
-                       reg = <0 0xfea30000 0 0x5000>;
-                       interrupts = <GIC_SPI 468 IRQ_TYPE_LEVEL_HIGH>;
-                       clocks = <&cpg CPG_MOD 621>;
-                       power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
-                       resets = <&cpg 621>;
-
-                       renesas,fcp = <&fcpvd2>;
-               };
-
-               vspi0: vsp@fe9a0000 {
-                       compatible = "renesas,vsp2";
-                       reg = <0 0xfe9a0000 0 0x8000>;
-                       interrupts = <GIC_SPI 444 IRQ_TYPE_LEVEL_HIGH>;
-                       clocks = <&cpg CPG_MOD 631>;
-                       power-domains = <&sysc R8A7795_PD_A3VP>;
-                       resets = <&cpg 631>;
-
-                       renesas,fcp = <&fcpvi0>;
-               };
-
-               vspi1: vsp@fe9b0000 {
-                       compatible = "renesas,vsp2";
-                       reg = <0 0xfe9b0000 0 0x8000>;
-                       interrupts = <GIC_SPI 445 IRQ_TYPE_LEVEL_HIGH>;
-                       clocks = <&cpg CPG_MOD 630>;
-                       power-domains = <&sysc R8A7795_PD_A3VP>;
-                       resets = <&cpg 630>;
-
-                       renesas,fcp = <&fcpvi1>;
-               };
-
                csi20: csi2@fea80000 {
                        compatible = "renesas,r8a7795-csi2";
                        reg = <0 0xfea80000 0 0x10000>;
@@ -3112,7 +3112,7 @@
                                 <&cpg CPG_MOD 722>,
                                 <&cpg CPG_MOD 721>;
                        clock-names = "du.0", "du.1", "du.2", "du.3";
-                       vsps = <&vspd0 0 &vspd1 0 &vspd2 0 &vspd0 1>;
+                       vsps = <&vspd0 0>, <&vspd1 0>, <&vspd2 0>, <&vspd0 1>;
                        status = "disabled";
 
                        ports {