Merge tag 'fbdev-v4.13' of git://github.com/bzolnier/linux
[sfrench/cifs-2.6.git] / arch / arm64 / boot / dts / marvell / armada-3720-db.dts
index a89855f57091fac35d3ba4b9821fd2a902f5ed77..9df0f06ce6070a4c17c724d52bb956504dc8e2b7 100644 (file)
  *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  *     OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * This file is compatible with the version 1.4 and the version 2.0 of
+ * the board, however the CON numbers are different between the 2
+ * version
  */
 
 /dts-v1/;
                compatible = "usb-nop-xceiv";
                vcc-supply = <&exp_usb3_vbus>;
        };
+
+       vcc_sd_reg1: regulator {
+               compatible = "regulator-gpio";
+               regulator-name = "vcc_sd1";
+               regulator-min-microvolt = <1800000>;
+               regulator-max-microvolt = <3300000>;
+               regulator-boot-on;
+
+               gpios = <&gpiosb 23 GPIO_ACTIVE_HIGH>;
+               gpios-states = <0>;
+               states = <1800000 0x1
+                         3300000 0x0>;
+               enable-active-high;
+       };
+};
+
+/* Gigabit module on CON19(V2.0)/CON21(V1.4) */
+&eth0 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&rgmii_pins>;
+       phy-mode = "rgmii-id";
+       phy = <&phy0>;
+       status = "okay";
+};
+
+/* Gigabit module on CON18(V2.0)/CON20(V1.4) */
+&eth1 {
+       phy-mode = "sgmii";
+       phy = <&phy1>;
+       status = "okay";
 };
 
 &i2c0 {
        };
 };
 
+&mdio {
+       status = "okay";
+       phy0: ethernet-phy@0 {
+               reg = <0>;
+       };
+
+       phy1: ethernet-phy@1 {
+               reg = <1>;
+       };
+};
+
+/* CON15(V2.0)/CON17(V1.4) : PCIe / CON15(V2.0)/CON12(V1.4) :mini-PCIe */
+&pcie0 {
+       status = "okay";
+};
+
 /* CON3 */
 &sata {
        status = "okay";
 };
 
+&sdhci0 {
+       non-removable;
+       bus-width = <8>;
+       mmc-ddr-1_8v;
+       mmc-hs400-1_8v;
+       marvell,pad-type = "fixed-1-8v";
+       status = "okay";
+};
+
+/* SD slot module on CON14(V2.0)/CON15(V1.4) */
+&sdhci1 {
+       wp-inverted;
+       cd-gpios = <&gpiosb 2 GPIO_ACTIVE_LOW>;
+       bus-width = <4>;
+       marvell,pad-type = "sd";
+       vqmmc-supply = <&vcc_sd_reg1>;
+       status = "okay";
+};
+
 &spi0 {
        status = "okay";
        pinctrl-names = "default";
        };
 };
 
-/* Exported on the micro USB connector CON32 through an FTDI */
+/*
+ * Exported on the micro USB connector CON30(V2.0)/CON32(V1.4) through
+ * an FTDI
+ */
 &uart0 {
        pinctrl-names = "default";
        pinctrl-0 = <&uart1_pins>;
        status = "okay";
 };
 
-&sdhci0 {
-       non-removable;
-       bus-width = <8>;
-       mmc-ddr-1_8v;
-       mmc-hs400-1_8v;
-       marvell,pad-type = "fixed-1-8v";
+/* CON27(V2.0)/CON29(V1.4) */
+&usb2 {
        status = "okay";
 };
 
-/* CON31 */
+/* CON29(V2.0)/CON31(V1.4) */
 &usb3 {
        status = "okay";
        usb-phy = <&usb3_phy>;
 };
-
-/* CON17 (PCIe) / CON12 (mini-PCIe) */
-&pcie0 {
-       status = "okay";
-};
-
-/* CON27 */
-&usb2 {
-       status = "okay";
-};
-
-
-&mdio {
-       status = "okay";
-       phy0: ethernet-phy@0 {
-               reg = <0>;
-       };
-
-       phy1: ethernet-phy@1 {
-               reg = <1>;
-       };
-};
-
-&eth0 {
-       pinctrl-names = "default";
-       pinctrl-0 = <&rgmii_pins>;
-       phy-mode = "rgmii-id";
-       phy = <&phy0>;
-       status = "okay";
-};
-
-&eth1 {
-       phy-mode = "sgmii";
-       phy = <&phy1>;
-       status = "okay";
-};