Merge branch 'x86-entry-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git...

[sfrench/cifs-2.6.git] / arch / arm64 / boot / dts / freescale / imx8qxp.dtsi

diff --git a/arch/arm64/boot/dts/freescale/imx8qxp.dtsi b/arch/arm64/boot/dts/freescale/imx8qxp.dtsi
index 05fa0b7f36bb18375a14d8255e4af2c0c02e5296..1133b412182aba7ac3a47b4ea66a7506f41bdc66 100644 (file)
--- a/arch/arm64/boot/dts/freescale/imx8qxp.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8qxp.dtsi
@@ -30,6 +30,9 @@
                mmc2 = &usdhc3;
                mu1 = &lsio_mu1;
                serial0 = &adma_lpuart0;
+               serial1 = &adma_lpuart1;
+               serial2 = &adma_lpuart2;
+               serial3 = &adma_lpuart3;
        };
 
        cpus {
@@ -113,6 +116,17 @@
                interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH>;
        };
 
+       reserved-memory {
+               #address-cells = <2>;
+               #size-cells = <2>;
+               ranges;
+
+               dsp_reserved: dsp@92400000 {
+                       reg = <0 0x92400000 0 0x2000000>;
+                       no-map;
+               };
+       };
+
        pmu {
                compatible = "arm,armv8-pmuv3";
                interrupts = <GIC_PPI 7 IRQ_TYPE_LEVEL_HIGH>;
@@ -204,13 +218,35 @@
                        #clock-cells = <1>;
                };
 
+               adma_dsp: dsp@596e8000 {
+                       compatible = "fsl,imx8qxp-dsp";
+                       reg = <0x596e8000 0x88000>;
+                       clocks = <&adma_lpcg IMX_ADMA_LPCG_DSP_IPG_CLK>,
+                               <&adma_lpcg IMX_ADMA_LPCG_OCRAM_IPG_CLK>,
+                               <&adma_lpcg IMX_ADMA_LPCG_DSP_CORE_CLK>;
+                       clock-names = "ipg", "ocram", "core";
+                       power-domains = <&pd IMX_SC_R_MU_13A>,
+                               <&pd IMX_SC_R_MU_13B>,
+                               <&pd IMX_SC_R_DSP>,
+                               <&pd IMX_SC_R_DSP_RAM>;
+                       mbox-names = "txdb0", "txdb1",
+                               "rxdb0", "rxdb1";
+                       mboxes = <&lsio_mu13 2 0>,
+                               <&lsio_mu13 2 1>,
+                               <&lsio_mu13 3 0>,
+                               <&lsio_mu13 3 1>;
+                       memory-region = <&dsp_reserved>;
+                       status = "disabled";
+               };
+
                adma_lpuart0: serial@5a060000 {
                        compatible = "fsl,imx8qxp-lpuart", "fsl,imx7ulp-lpuart";
                        reg = <0x5a060000 0x1000>;
                        interrupts = <GIC_SPI 225 IRQ_TYPE_LEVEL_HIGH>;
                        interrupt-parent = <&gic>;
-                       clocks = <&adma_lpcg IMX_ADMA_LPCG_UART0_BAUD_CLK>;
-                       clock-names = "ipg";
+                       clocks = <&adma_lpcg IMX_ADMA_LPCG_UART0_IPG_CLK>,
+                                <&adma_lpcg IMX_ADMA_LPCG_UART0_BAUD_CLK>;
+                       clock-names = "ipg", "baud";
                        power-domains = <&pd IMX_SC_R_UART_0>;
                        status = "disabled";
                };
@@ -220,8 +256,9 @@
                        reg = <0x5a070000 0x1000>;
                        interrupts = <GIC_SPI 226 IRQ_TYPE_LEVEL_HIGH>;
                        interrupt-parent = <&gic>;
-                       clocks = <&adma_lpcg IMX_ADMA_LPCG_UART1_BAUD_CLK>;
-                       clock-names = "ipg";
+                       clocks = <&adma_lpcg IMX_ADMA_LPCG_UART1_IPG_CLK>,
+                                <&adma_lpcg IMX_ADMA_LPCG_UART1_BAUD_CLK>;
+                       clock-names = "ipg", "baud";
                        power-domains = <&pd IMX_SC_R_UART_1>;
                        status = "disabled";
                };
@@ -231,8 +268,9 @@
                        reg = <0x5a080000 0x1000>;
                        interrupts = <GIC_SPI 227 IRQ_TYPE_LEVEL_HIGH>;
                        interrupt-parent = <&gic>;
-                       clocks = <&adma_lpcg IMX_ADMA_LPCG_UART2_BAUD_CLK>;
-                       clock-names = "ipg";
+                       clocks = <&adma_lpcg IMX_ADMA_LPCG_UART2_IPG_CLK>,
+                                <&adma_lpcg IMX_ADMA_LPCG_UART2_BAUD_CLK>;
+                       clock-names = "ipg", "baud";
                        power-domains = <&pd IMX_SC_R_UART_2>;
                        status = "disabled";
                };
@@ -242,8 +280,9 @@
                        reg = <0x5a090000 0x1000>;
                        interrupts = <GIC_SPI 228 IRQ_TYPE_LEVEL_HIGH>;
                        interrupt-parent = <&gic>;
-                       clocks = <&adma_lpcg IMX_ADMA_LPCG_UART3_BAUD_CLK>;
-                       clock-names = "ipg";
+                       clocks = <&adma_lpcg IMX_ADMA_LPCG_UART3_IPG_CLK>,
+                                <&adma_lpcg IMX_ADMA_LPCG_UART3_BAUD_CLK>;
+                       clock-names = "ipg", "baud";
                        power-domains = <&pd IMX_SC_R_UART_3>;
                        status = "disabled";
                };