Merge branch 'x86-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel...

[sfrench/cifs-2.6.git] / arch / arm64 / boot / dts / freescale / fsl-ls2088a.dtsi

diff --git a/arch/arm64/boot/dts/freescale/fsl-ls2088a.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls2088a.dtsi
index 5c695c6580566020a647f7bbe80efef7df227131..6aa319dae396ffffc135b4e9af9e893029dd1ba7 100644 (file)
--- a/arch/arm64/boot/dts/freescale/fsl-ls2088a.dtsi
+++ b/arch/arm64/boot/dts/freescale/fsl-ls2088a.dtsi
@@ -53,6 +53,7 @@
                compatible = "arm,cortex-a72";
                reg = <0x0>;
                clocks = <&clockgen 1 0>;
+               cpu-idle-states = <&CPU_PW20>;
                next-level-cache = <&cluster0_l2>;
                #cooling-cells = <2>;
        };
@@ -62,6 +63,7 @@
                compatible = "arm,cortex-a72";
                reg = <0x1>;
                clocks = <&clockgen 1 0>;
+               cpu-idle-states = <&CPU_PW20>;
                next-level-cache = <&cluster0_l2>;
        };
 
@@ -70,6 +72,7 @@
                compatible = "arm,cortex-a72";
                reg = <0x100>;
                clocks = <&clockgen 1 1>;
+               cpu-idle-states = <&CPU_PW20>;
                next-level-cache = <&cluster1_l2>;
                #cooling-cells = <2>;
        };
@@ -79,6 +82,7 @@
                compatible = "arm,cortex-a72";
                reg = <0x101>;
                clocks = <&clockgen 1 1>;
+               cpu-idle-states = <&CPU_PW20>;
                next-level-cache = <&cluster1_l2>;
        };
 
@@ -88,6 +92,7 @@
                reg = <0x200>;
                clocks = <&clockgen 1 2>;
                next-level-cache = <&cluster2_l2>;
+               cpu-idle-states = <&CPU_PW20>;
                #cooling-cells = <2>;
        };
 
@@ -96,6 +101,7 @@
                compatible = "arm,cortex-a72";
                reg = <0x201>;
                clocks = <&clockgen 1 2>;
+               cpu-idle-states = <&CPU_PW20>;
                next-level-cache = <&cluster2_l2>;
        };
 
@@ -104,6 +110,7 @@
                compatible = "arm,cortex-a72";
                reg = <0x300>;
                clocks = <&clockgen 1 3>;
+               cpu-idle-states = <&CPU_PW20>;
                next-level-cache = <&cluster3_l2>;
                #cooling-cells = <2>;
        };
@@ -113,6 +120,7 @@
                compatible = "arm,cortex-a72";
                reg = <0x301>;
                clocks = <&clockgen 1 3>;
+               cpu-idle-states = <&CPU_PW20>;
                next-level-cache = <&cluster3_l2>;
        };
 
@@ -131,6 +139,15 @@
        cluster3_l2: l2-cache3 {
                compatible = "cache";
        };
+
+       CPU_PW20: cpu-pw20 {
+               compatible = "arm,idle-state";
+               idle-state-name = "PW20";
+               arm,psci-suspend-param = <0x00010000>;
+               entry-latency-us = <2000>;
+               exit-latency-us = <2000>;
+               min-residency-us = <6000>;
+       };
 };
 
 &pcie1 {