Merge tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc
[sfrench/cifs-2.6.git] / arch / arm64 / boot / dts / freescale / fsl-ls1028a.dtsi
index 22a1c74dddf390a1f948fbfc7eb28ad5a32567af..7975519b4f5616f9b43c180224c20ddf438ea185 100644 (file)
                clock-output-names = "sysclk";
        };
 
+       dpclk: clock-dp {
+               compatible = "fixed-clock";
+               #clock-cells = <0>;
+               clock-frequency = <27000000>;
+               clock-output-names= "dpclk";
+       };
+
+       aclk: clock-axi {
+               compatible = "fixed-clock";
+               #clock-cells = <0>;
+               clock-frequency = <650000000>;
+               clock-output-names= "aclk";
+       };
+
+       pclk: clock-apb {
+               compatible = "fixed-clock";
+               #clock-cells = <0>;
+               clock-frequency = <650000000>;
+               clock-output-names= "pclk";
+       };
+
        reboot {
                compatible ="syscon-reboot";
                regmap = <&dcfg>;
                        #interrupt-cells = <2>;
                };
 
-               wdog0: watchdog@23c0000 {
-                       compatible = "fsl,ls1028a-wdt", "fsl,imx21-wdt";
-                       reg = <0x0 0x23c0000 0x0 0x10000>;
-                       interrupts = <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>;
-                       clocks = <&clockgen 4 1>;
-                       big-endian;
-                       status = "disabled";
+               usb0: usb@3100000 {
+                       compatible = "fsl,ls1028a-dwc3", "snps,dwc3";
+                       reg = <0x0 0x3100000 0x0 0x10000>;
+                       interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>;
+                       dr_mode = "host";
+                       snps,dis_rxdet_inp3_quirk;
+                       snps,quirk-frame-length-adjustment = <0x20>;
+                       snps,incr-burst-type-adjustment = <1>, <4>, <8>, <16>;
+               };
+
+               usb1: usb@3110000 {
+                       compatible = "fsl,ls1028a-dwc3", "snps,dwc3";
+                       reg = <0x0 0x3110000 0x0 0x10000>;
+                       interrupts = <GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH>;
+                       dr_mode = "host";
+                       snps,dis_rxdet_inp3_quirk;
+                       snps,quirk-frame-length-adjustment = <0x20>;
+                       snps,incr-burst-type-adjustment = <1>, <4>, <8>, <16>;
                };
 
                sata: sata@3200000 {
                                     <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH>;
                };
 
+               crypto: crypto@8000000 {
+                       compatible = "fsl,sec-v5.0", "fsl,sec-v4.0";
+                       fsl,sec-era = <10>;
+                       #address-cells = <1>;
+                       #size-cells = <1>;
+                       ranges = <0x0 0x00 0x8000000 0x100000>;
+                       reg = <0x00 0x8000000 0x0 0x100000>;
+                       interrupts = <GIC_SPI 139 IRQ_TYPE_LEVEL_HIGH>;
+                       dma-coherent;
+
+                       sec_jr0: jr@10000 {
+                               compatible = "fsl,sec-v5.0-job-ring",
+                                            "fsl,sec-v4.0-job-ring";
+                               reg     = <0x10000 0x10000>;
+                               interrupts = <GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>;
+                       };
+
+                       sec_jr1: jr@20000 {
+                               compatible = "fsl,sec-v5.0-job-ring",
+                                            "fsl,sec-v4.0-job-ring";
+                               reg     = <0x20000 0x10000>;
+                               interrupts = <GIC_SPI 141 IRQ_TYPE_LEVEL_HIGH>;
+                       };
+
+                       sec_jr2: jr@30000 {
+                               compatible = "fsl,sec-v5.0-job-ring",
+                                            "fsl,sec-v4.0-job-ring";
+                               reg     = <0x30000 0x10000>;
+                               interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>;
+                       };
+
+                       sec_jr3: jr@40000 {
+                               compatible = "fsl,sec-v5.0-job-ring",
+                                            "fsl,sec-v4.0-job-ring";
+                               reg     = <0x40000 0x10000>;
+                               interrupts = <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>;
+                       };
+               };
+
+               qdma: dma-controller@8380000 {
+                       compatible = "fsl,ls1028a-qdma", "fsl,ls1021a-qdma";
+                       reg = <0x0 0x8380000 0x0 0x1000>, /* Controller regs */
+                             <0x0 0x8390000 0x0 0x10000>, /* Status regs */
+                             <0x0 0x83a0000 0x0 0x40000>; /* Block regs */
+                       interrupts = <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 251 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 252 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 253 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 254 IRQ_TYPE_LEVEL_HIGH>;
+                       interrupt-names = "qdma-error", "qdma-queue0",
+                               "qdma-queue1", "qdma-queue2", "qdma-queue3";
+                       dma-channels = <8>;
+                       block-number = <1>;
+                       block-offset = <0x10000>;
+                       fsl,dma-queues = <2>;
+                       status-sizes = <64>;
+                       queue-sizes = <64 64>;
+               };
+
+               cluster1_core0_watchdog: watchdog@c000000 {
+                       compatible = "arm,sp805", "arm,primecell";
+                       reg = <0x0 0xc000000 0x0 0x1000>;
+                       clocks = <&clockgen 4 15>, <&clockgen 4 15>;
+                       clock-names = "apb_pclk", "wdog_clk";
+               };
+
+               cluster1_core1_watchdog: watchdog@c010000 {
+                       compatible = "arm,sp805", "arm,primecell";
+                       reg = <0x0 0xc010000 0x0 0x1000>;
+                       clocks = <&clockgen 4 15>, <&clockgen 4 15>;
+                       clock-names = "apb_pclk", "wdog_clk";
+               };
+
                sai1: audio-controller@f100000 {
                        #sound-dai-cells = <0>;
                        compatible = "fsl,vf610-sai";
                        };
                };
        };
+
+       malidp0: display@f080000 {
+               compatible = "arm,mali-dp500";
+               reg = <0x0 0xf080000 0x0 0x10000>;
+               interrupts = <0 222 IRQ_TYPE_LEVEL_HIGH>,
+                            <0 223 IRQ_TYPE_LEVEL_HIGH>;
+               interrupt-names = "DE", "SE";
+               clocks = <&dpclk>, <&aclk>, <&aclk>, <&pclk>;
+               clock-names = "pxlclk", "mclk", "aclk", "pclk";
+               arm,malidp-output-port-lines = /bits/ 8 <8 8 8>;
+
+               port {
+                       dp0_out: endpoint {
+
+                       };
+               };
+       };
 };