Merge branch 'dmi-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/jdelvar...

[sfrench/cifs-2.6.git] / arch / arm64 / boot / dts / allwinner / sun50i-h6.dtsi

diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
index 56563150d61a91eac2f77b272042a45d57adfb96..c72da8cd9ef5881eceedcf8390fbcda620c5cac9 100644 (file)
--- a/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
@@ -4,6 +4,8 @@
  */
 
 #include <dt-bindings/interrupt-controller/arm-gic.h>
+#include <dt-bindings/clock/sun50i-h6-ccu.h>
+#include <dt-bindings/reset/sun50i-h6-ccu.h>
 
 / {
        interrupt-parent = <&gic>;
@@ -115,7 +117,7 @@
                                     <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>,
                                     <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>,
                                     <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>;
-                       clocks = <&ccu 26>, <&osc24M>, <&osc32k>;
+                       clocks = <&ccu CLK_APB1>, <&osc24M>, <&osc32k>;
                        clock-names = "apb", "hosc", "losc";
                        gpio-controller;
                        #gpio-cells = <3>;
@@ -134,8 +136,8 @@
                        interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>;
                        reg-shift = <2>;
                        reg-io-width = <4>;
-                       clocks = <&ccu 70>;
-                       resets = <&ccu 21>;
+                       clocks = <&ccu CLK_BUS_UART0>;
+                       resets = <&ccu RST_BUS_UART0>;
                        status = "disabled";
                };
 
@@ -145,8 +147,8 @@
                        interrupts = <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>;
                        reg-shift = <2>;
                        reg-io-width = <4>;
-                       clocks = <&ccu 71>;
-                       resets = <&ccu 22>;
+                       clocks = <&ccu CLK_BUS_UART1>;
+                       resets = <&ccu RST_BUS_UART1>;
                        status = "disabled";
                };
 
@@ -156,8 +158,8 @@
                        interrupts = <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>;
                        reg-shift = <2>;
                        reg-io-width = <4>;
-                       clocks = <&ccu 72>;
-                       resets = <&ccu 23>;
+                       clocks = <&ccu CLK_BUS_UART2>;
+                       resets = <&ccu RST_BUS_UART2>;
                        status = "disabled";
                };
 
@@ -167,9 +169,59 @@
                        interrupts = <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>;
                        reg-shift = <2>;
                        reg-io-width = <4>;
-                       clocks = <&ccu 73>;
-                       resets = <&ccu 24>;
+                       clocks = <&ccu CLK_BUS_UART3>;
+                       resets = <&ccu RST_BUS_UART3>;
                        status = "disabled";
                };
+
+               r_ccu: clock@7010000 {
+                       compatible = "allwinner,sun50i-h6-r-ccu";
+                       reg = <0x07010000 0x400>;
+                       clocks = <&osc24M>, <&osc32k>, <&iosc>,
+                                <&ccu CLK_PLL_PERIPH0>;
+                       clock-names = "hosc", "losc", "iosc", "pll-periph";
+                       #clock-cells = <1>;
+                       #reset-cells = <1>;
+               };
+
+               r_intc: interrupt-controller@7021000 {
+                       compatible = "allwinner,sun50i-h6-r-intc",
+                                    "allwinner,sun6i-a31-r-intc";
+                       interrupt-controller;
+                       #interrupt-cells = <2>;
+                       reg = <0x07021000 0x400>;
+                       interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>;
+               };
+
+               r_pio: pinctrl@7022000 {
+                       compatible = "allwinner,sun50i-h6-r-pinctrl";
+                       reg = <0x07022000 0x400>;
+                       interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&r_ccu 2>, <&osc24M>, <&osc32k>;
+                       clock-names = "apb", "hosc", "losc";
+                       gpio-controller;
+                       #gpio-cells = <3>;
+                       interrupt-controller;
+                       #interrupt-cells = <3>;
+
+                       r_i2c_pins: r-i2c {
+                               pins = "PL0", "PL1";
+                               function = "s_i2c";
+                       };
+               };
+
+               r_i2c: i2c@7081400 {
+                       compatible = "allwinner,sun6i-a31-i2c";
+                       reg = <0x07081400 0x400>;
+                       interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&r_ccu 8>;
+                       resets = <&r_ccu 4>;
+                       pinctrl-names = "default";
+                       pinctrl-0 = <&r_i2c_pins>;
+                       status = "disabled";
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+               };
        };
 };