Merge v4.13 intel_pstate fixes.

[sfrench/cifs-2.6.git] / arch / arm64 / boot / dts / allwinner / sun50i-a64.dtsi

diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
index 166c9ef884dc6e52432e0030d06f1b7036d2c428..9d00622ce8453820441e9c3c26980cab35c3dcd8 100644 (file)
--- a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
@@ -43,6 +43,7 @@
  */
 
 #include <dt-bindings/clock/sun50i-a64-ccu.h>
+#include <dt-bindings/clock/sun8i-r-ccu.h>
 #include <dt-bindings/interrupt-controller/arm-gic.h>
 #include <dt-bindings/reset/sun50i-a64-ccu.h>
 
@@ -129,6 +130,12 @@
                #size-cells = <1>;
                ranges;
 
+               syscon: syscon@1c00000 {
+                       compatible = "allwinner,sun50i-a64-system-controller",
+                               "syscon";
+                       reg = <0x01c00000 0x1000>;
+               };
+
                mmc0: mmc@1c0f000 {
                        compatible = "allwinner,sun50i-a64-mmc";
                        reg = <0x01c0f000 0x1000>;
@@ -204,6 +211,28 @@
                        #phy-cells = <1>;
                };
 
+               ehci0: usb@01c1a000 {
+                       compatible = "allwinner,sun50i-a64-ehci", "generic-ehci";
+                       reg = <0x01c1a000 0x100>;
+                       interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&ccu CLK_BUS_OHCI0>,
+                                <&ccu CLK_BUS_EHCI0>,
+                                <&ccu CLK_USB_OHCI0>;
+                       resets = <&ccu RST_BUS_OHCI0>,
+                                <&ccu RST_BUS_EHCI0>;
+                       status = "disabled";
+               };
+
+               ohci0: usb@01c1a400 {
+                       compatible = "allwinner,sun50i-a64-ohci", "generic-ohci";
+                       reg = <0x01c1a400 0x100>;
+                       interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&ccu CLK_BUS_OHCI0>,
+                                <&ccu CLK_USB_OHCI0>;
+                       resets = <&ccu RST_BUS_OHCI0>;
+                       status = "disabled";
+               };
+
                ehci1: usb@01c1b000 {
                        compatible = "allwinner,sun50i-a64-ehci", "generic-ehci";
                        reg = <0x01c1b000 0x100>;
@@ -281,6 +310,21 @@
                                bias-pull-up;
                        };
 
+                       rmii_pins: rmii_pins {
+                               pins = "PD10", "PD11", "PD13", "PD14", "PD17",
+                                      "PD18", "PD19", "PD20", "PD22", "PD23";
+                               function = "emac";
+                               drive-strength = <40>;
+                       };
+
+                       rgmii_pins: rgmii_pins {
+                               pins = "PD8", "PD9", "PD10", "PD11", "PD12",
+                                      "PD13", "PD15", "PD16", "PD17", "PD18",
+                                      "PD19", "PD20", "PD21", "PD22", "PD23";
+                               function = "emac";
+                               drive-strength = <40>;
+                       };
+
                        uart0_pins_a: uart0@0 {
                                pins = "PB8", "PB9";
                                function = "uart0";
@@ -295,6 +339,26 @@
                                pins = "PG8", "PG9";
                                function = "uart1";
                        };
+
+                       uart2_pins: uart2-pins {
+                               pins = "PB0", "PB1";
+                               function = "uart2";
+                       };
+
+                       uart3_pins: uart3-pins {
+                               pins = "PD0", "PD1";
+                               function = "uart3";
+                       };
+
+                       uart4_pins: uart4-pins {
+                               pins = "PD2", "PD3";
+                               function = "uart4";
+                       };
+
+                       uart4_rts_cts_pins: uart4-rts-cts-pins {
+                               pins = "PD4", "PD5";
+                               function = "uart4";
+                       };
                };
 
                uart0: serial@1c28000 {
@@ -303,8 +367,8 @@
                        interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>;
                        reg-shift = <2>;
                        reg-io-width = <4>;
-                       clocks = <&ccu 67>;
-                       resets = <&ccu 46>;
+                       clocks = <&ccu CLK_BUS_UART0>;
+                       resets = <&ccu RST_BUS_UART0>;
                        status = "disabled";
                };
 
@@ -314,8 +378,8 @@
                        interrupts = <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>;
                        reg-shift = <2>;
                        reg-io-width = <4>;
-                       clocks = <&ccu 68>;
-                       resets = <&ccu 47>;
+                       clocks = <&ccu CLK_BUS_UART1>;
+                       resets = <&ccu RST_BUS_UART1>;
                        status = "disabled";
                };
 
@@ -325,8 +389,8 @@
                        interrupts = <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>;
                        reg-shift = <2>;
                        reg-io-width = <4>;
-                       clocks = <&ccu 69>;
-                       resets = <&ccu 48>;
+                       clocks = <&ccu CLK_BUS_UART2>;
+                       resets = <&ccu RST_BUS_UART2>;
                        status = "disabled";
                };
 
@@ -336,8 +400,8 @@
                        interrupts = <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>;
                        reg-shift = <2>;
                        reg-io-width = <4>;
-                       clocks = <&ccu 70>;
-                       resets = <&ccu 49>;
+                       clocks = <&ccu CLK_BUS_UART3>;
+                       resets = <&ccu RST_BUS_UART3>;
                        status = "disabled";
                };
 
@@ -347,8 +411,8 @@
                        interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
                        reg-shift = <2>;
                        reg-io-width = <4>;
-                       clocks = <&ccu 71>;
-                       resets = <&ccu 50>;
+                       clocks = <&ccu CLK_BUS_UART4>;
+                       resets = <&ccu RST_BUS_UART4>;
                        status = "disabled";
                };
 
@@ -356,8 +420,8 @@
                        compatible = "allwinner,sun6i-a31-i2c";
                        reg = <0x01c2ac00 0x400>;
                        interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
-                       clocks = <&ccu 63>;
-                       resets = <&ccu 42>;
+                       clocks = <&ccu CLK_BUS_I2C0>;
+                       resets = <&ccu RST_BUS_I2C0>;
                        status = "disabled";
                        #address-cells = <1>;
                        #size-cells = <0>;
@@ -367,8 +431,8 @@
                        compatible = "allwinner,sun6i-a31-i2c";
                        reg = <0x01c2b000 0x400>;
                        interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
-                       clocks = <&ccu 64>;
-                       resets = <&ccu 43>;
+                       clocks = <&ccu CLK_BUS_I2C1>;
+                       resets = <&ccu RST_BUS_I2C1>;
                        status = "disabled";
                        #address-cells = <1>;
                        #size-cells = <0>;
@@ -378,11 +442,31 @@
                        compatible = "allwinner,sun6i-a31-i2c";
                        reg = <0x01c2b400 0x400>;
                        interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
-                       clocks = <&ccu 65>;
-                       resets = <&ccu 44>;
+                       clocks = <&ccu CLK_BUS_I2C2>;
+                       resets = <&ccu RST_BUS_I2C2>;
+                       status = "disabled";
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+               };
+
+               emac: ethernet@1c30000 {
+                       compatible = "allwinner,sun50i-a64-emac";
+                       syscon = <&syscon>;
+                       reg = <0x01c30000 0x100>;
+                       interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>;
+                       interrupt-names = "macirq";
+                       resets = <&ccu RST_BUS_EMAC>;
+                       reset-names = "stmmaceth";
+                       clocks = <&ccu CLK_BUS_EMAC>;
+                       clock-names = "stmmaceth";
                        status = "disabled";
                        #address-cells = <1>;
                        #size-cells = <0>;
+
+                       mdio: mdio {
+                               #address-cells = <1>;
+                               #size-cells = <0>;
+                       };
                };
 
                gic: interrupt-controller@1c81000 {
@@ -417,12 +501,31 @@
                        compatible = "allwinner,sun50i-a64-r-pinctrl";
                        reg = <0x01f02c00 0x400>;
                        interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>;
-                       clocks = <&r_ccu 3>, <&osc24M>, <&osc32k>;
+                       clocks = <&r_ccu CLK_APB0_PIO>, <&osc24M>, <&osc32k>;
                        clock-names = "apb", "hosc", "losc";
                        gpio-controller;
                        #gpio-cells = <3>;
                        interrupt-controller;
                        #interrupt-cells = <3>;
+
+                       r_rsb_pins: rsb@0 {
+                               pins = "PL0", "PL1";
+                               function = "s_rsb";
+                       };
+               };
+
+               r_rsb: rsb@1f03400 {
+                       compatible = "allwinner,sun8i-a23-rsb";
+                       reg = <0x01f03400 0x400>;
+                       interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&r_ccu 6>;
+                       clock-frequency = <3000000>;
+                       resets = <&r_ccu 2>;
+                       pinctrl-names = "default";
+                       pinctrl-0 = <&r_rsb_pins>;
+                       status = "disabled";
+                       #address-cells = <1>;
+                       #size-cells = <0>;
                };
        };
 };