Merge tag 'tag-chrome-platform-for-v5.1' of git://git.kernel.org/pub/scm/linux/kernel...

[sfrench/cifs-2.6.git] / arch / arm64 / Kconfig

diff --git a/arch/arm64/Kconfig b/arch/arm64/Kconfig
index cfbf307d6dc4e2e8f1cf7a33dfb552452fb55360..117b2541ef3d16dfe09ba67784e9faf3b43634e6 100644 (file)
--- a/arch/arm64/Kconfig
+++ b/arch/arm64/Kconfig
@@ -22,12 +22,14 @@ config ARM64
        select ARCH_HAS_KCOV
        select ARCH_HAS_MEMBARRIER_SYNC_CORE
        select ARCH_HAS_PTE_SPECIAL
+       select ARCH_HAS_SETUP_DMA_OPS
        select ARCH_HAS_SET_MEMORY
        select ARCH_HAS_STRICT_KERNEL_RWX
        select ARCH_HAS_STRICT_MODULE_RWX
        select ARCH_HAS_SYNC_DMA_FOR_DEVICE
        select ARCH_HAS_SYNC_DMA_FOR_CPU
        select ARCH_HAS_SYSCALL_WRAPPER
+       select ARCH_HAS_TEARDOWN_DMA_OPS if IOMMU_SUPPORT
        select ARCH_HAS_TICK_BROADCAST if GENERIC_CLOCKEVENTS_BROADCAST
        select ARCH_HAVE_NMI_SAFE_CMPXCHG
        select ARCH_INLINE_READ_LOCK if !PREEMPT
@@ -137,7 +139,6 @@ config ARM64
        select HAVE_FUNCTION_TRACER
        select HAVE_FUNCTION_GRAPH_TRACER
        select HAVE_GCC_PLUGINS
-       select HAVE_GENERIC_DMA_COHERENT
        select HAVE_HW_BREAKPOINT if PERF_EVENTS
        select HAVE_IRQ_TIME_ACCOUNTING
        select HAVE_MEMBLOCK_NODE_MAP if NUMA
@@ -163,7 +164,6 @@ config ARM64
        select NEED_SG_DMA_LENGTH
        select OF
        select OF_EARLY_FLATTREE
-       select OF_RESERVED_MEM
        select PCI_DOMAINS_GENERIC if PCI
        select PCI_ECAM if (ACPI && PCI)
        select PCI_SYSCALL if PCI
@@ -643,6 +643,25 @@ config QCOM_FALKOR_ERRATUM_E1041
 
          If unsure, say Y.
 
+config FUJITSU_ERRATUM_010001
+       bool "Fujitsu-A64FX erratum E#010001: Undefined fault may occur wrongly"
+       default y
+       help
+         This option adds workaround for Fujitsu-A64FX erratum E#010001.
+         On some variants of the Fujitsu-A64FX cores ver(1.0, 1.1), memory
+         accesses may cause undefined fault (Data abort, DFSC=0b111111).
+         This fault occurs under a specific hardware condition when a
+         load/store instruction performs an address translation using:
+         case-1  TTBR0_EL1 with TCR_EL1.NFD0 == 1.
+         case-2  TTBR0_EL2 with TCR_EL2.NFD0 == 1.
+         case-3  TTBR1_EL1 with TCR_EL1.NFD1 == 1.
+         case-4  TTBR1_EL2 with TCR_EL2.NFD1 == 1.
+
+         The workaround is to ensure these bits are clear in TCR_ELx.
+         The workaround only affect the Fujitsu-A64FX.
+
+         If unsure, say Y.
+
 endmenu
 
 
@@ -792,8 +811,7 @@ config SCHED_SMT
 config NR_CPUS
        int "Maximum number of CPUs (2-4096)"
        range 2 4096
-       # These have to remain sorted largest to smallest
-       default "64"
+       default "256"
 
 config HOTPLUG_CPU
        bool "Support for hot-pluggable CPUs"
@@ -1328,6 +1346,20 @@ config ARM64_MODULE_PLTS
        bool
        select HAVE_MOD_ARCH_SPECIFIC
 
+config ARM64_PSEUDO_NMI
+       bool "Support for NMI-like interrupts"
+       select CONFIG_ARM_GIC_V3
+       help
+         Adds support for mimicking Non-Maskable Interrupts through the use of
+         GIC interrupt priority. This support requires version 3 or later of
+         Arm GIC.
+
+         This high priority configuration for interrupts needs to be
+         explicitly enabled by setting the kernel parameter
+         "irqchip.gicv3_pseudo_nmi" to 1.
+
+         If unsure, say N
+
 config RELOCATABLE
        bool
        help