Merge branch 'master' of git://oak/home/sfr/kernels/iseries/work
[sfrench/cifs-2.6.git] / arch / arm / vfp / vfpdouble.c
index 009038c8113e873cd66d35267619a6a015de7ad0..4fc05ee0a2ef3c5b04db9d81993b450892b33660 100644 (file)
@@ -195,7 +195,7 @@ u32 vfp_double_normaliseround(int dd, struct vfp_double *vd, u32 fpscr, u32 exce
                s64 d = vfp_double_pack(vd);
                pr_debug("VFP: %s: d(d%d)=%016llx exceptions=%08x\n", func,
                         dd, d, exceptions);
-               vfp_put_double(dd, d);
+               vfp_put_double(d, dd);
        }
        return exceptions;
 }
@@ -250,19 +250,19 @@ vfp_propagate_nan(struct vfp_double *vdd, struct vfp_double *vdn,
  */
 static u32 vfp_double_fabs(int dd, int unused, int dm, u32 fpscr)
 {
-       vfp_put_double(dd, vfp_double_packed_abs(vfp_get_double(dm)));
+       vfp_put_double(vfp_double_packed_abs(vfp_get_double(dm)), dd);
        return 0;
 }
 
 static u32 vfp_double_fcpy(int dd, int unused, int dm, u32 fpscr)
 {
-       vfp_put_double(dd, vfp_get_double(dm));
+       vfp_put_double(vfp_get_double(dm), dd);
        return 0;
 }
 
 static u32 vfp_double_fneg(int dd, int unused, int dm, u32 fpscr)
 {
-       vfp_put_double(dd, vfp_double_packed_negate(vfp_get_double(dm)));
+       vfp_put_double(vfp_double_packed_negate(vfp_get_double(dm)), dd);
        return 0;
 }
 
@@ -287,7 +287,7 @@ static u32 vfp_double_fsqrt(int dd, int unused, int dm, u32 fpscr)
                        vdp = &vfp_double_default_qnan;
                        ret = FPSCR_IOC;
                }
-               vfp_put_double(dd, vfp_double_pack(vdp));
+               vfp_put_double(vfp_double_pack(vdp), dd);
                return ret;
        }
 
@@ -465,7 +465,7 @@ static u32 vfp_double_fcvts(int sd, int unused, int dm, u32 fpscr)
         */
        if (tm & (VFP_INFINITY|VFP_NAN)) {
                vsd.exponent = 255;
-               if (tm & VFP_NAN)
+               if (tm == VFP_QNAN)
                        vsd.significand |= VFP_SINGLE_SIGNIFICAND_QNAN;
                goto pack_nan;
        } else if (tm & VFP_ZERO)
@@ -476,7 +476,7 @@ static u32 vfp_double_fcvts(int sd, int unused, int dm, u32 fpscr)
        return vfp_single_normaliseround(sd, &vsd, fpscr, exceptions, "fcvts");
 
  pack_nan:
-       vfp_put_float(sd, vfp_single_pack(&vsd));
+       vfp_put_float(vfp_single_pack(&vsd), sd);
        return exceptions;
 }
 
@@ -573,7 +573,7 @@ static u32 vfp_double_ftoui(int sd, int unused, int dm, u32 fpscr)
 
        pr_debug("VFP: ftoui: d(s%d)=%08x exceptions=%08x\n", sd, d, exceptions);
 
-       vfp_put_float(sd, d);
+       vfp_put_float(d, sd);
 
        return exceptions;
 }
@@ -648,7 +648,7 @@ static u32 vfp_double_ftosi(int sd, int unused, int dm, u32 fpscr)
 
        pr_debug("VFP: ftosi: d(s%d)=%08x exceptions=%08x\n", sd, d, exceptions);
 
-       vfp_put_float(sd, (s32)d);
+       vfp_put_float((s32)d, sd);
 
        return exceptions;
 }
@@ -659,22 +659,22 @@ static u32 vfp_double_ftosiz(int dd, int unused, int dm, u32 fpscr)
 }
 
 
-static u32 (* const fop_extfns[32])(int dd, int unused, int dm, u32 fpscr) = {
-       [FEXT_TO_IDX(FEXT_FCPY)]        = vfp_double_fcpy,
-       [FEXT_TO_IDX(FEXT_FABS)]        = vfp_double_fabs,
-       [FEXT_TO_IDX(FEXT_FNEG)]        = vfp_double_fneg,
-       [FEXT_TO_IDX(FEXT_FSQRT)]       = vfp_double_fsqrt,
-       [FEXT_TO_IDX(FEXT_FCMP)]        = vfp_double_fcmp,
-       [FEXT_TO_IDX(FEXT_FCMPE)]       = vfp_double_fcmpe,
-       [FEXT_TO_IDX(FEXT_FCMPZ)]       = vfp_double_fcmpz,
-       [FEXT_TO_IDX(FEXT_FCMPEZ)]      = vfp_double_fcmpez,
-       [FEXT_TO_IDX(FEXT_FCVT)]        = vfp_double_fcvts,
-       [FEXT_TO_IDX(FEXT_FUITO)]       = vfp_double_fuito,
-       [FEXT_TO_IDX(FEXT_FSITO)]       = vfp_double_fsito,
-       [FEXT_TO_IDX(FEXT_FTOUI)]       = vfp_double_ftoui,
-       [FEXT_TO_IDX(FEXT_FTOUIZ)]      = vfp_double_ftouiz,
-       [FEXT_TO_IDX(FEXT_FTOSI)]       = vfp_double_ftosi,
-       [FEXT_TO_IDX(FEXT_FTOSIZ)]      = vfp_double_ftosiz,
+static struct op fops_ext[32] = {
+       [FEXT_TO_IDX(FEXT_FCPY)]        = { vfp_double_fcpy,   0 },
+       [FEXT_TO_IDX(FEXT_FABS)]        = { vfp_double_fabs,   0 },
+       [FEXT_TO_IDX(FEXT_FNEG)]        = { vfp_double_fneg,   0 },
+       [FEXT_TO_IDX(FEXT_FSQRT)]       = { vfp_double_fsqrt,  0 },
+       [FEXT_TO_IDX(FEXT_FCMP)]        = { vfp_double_fcmp,   OP_SCALAR },
+       [FEXT_TO_IDX(FEXT_FCMPE)]       = { vfp_double_fcmpe,  OP_SCALAR },
+       [FEXT_TO_IDX(FEXT_FCMPZ)]       = { vfp_double_fcmpz,  OP_SCALAR },
+       [FEXT_TO_IDX(FEXT_FCMPEZ)]      = { vfp_double_fcmpez, OP_SCALAR },
+       [FEXT_TO_IDX(FEXT_FCVT)]        = { vfp_double_fcvts,  OP_SCALAR|OP_SD },
+       [FEXT_TO_IDX(FEXT_FUITO)]       = { vfp_double_fuito,  OP_SCALAR },
+       [FEXT_TO_IDX(FEXT_FSITO)]       = { vfp_double_fsito,  OP_SCALAR },
+       [FEXT_TO_IDX(FEXT_FTOUI)]       = { vfp_double_ftoui,  OP_SCALAR|OP_SD },
+       [FEXT_TO_IDX(FEXT_FTOUIZ)]      = { vfp_double_ftouiz, OP_SCALAR|OP_SD },
+       [FEXT_TO_IDX(FEXT_FTOSI)]       = { vfp_double_ftosi,  OP_SCALAR|OP_SD },
+       [FEXT_TO_IDX(FEXT_FTOSIZ)]      = { vfp_double_ftosiz, OP_SCALAR|OP_SD },
 };
 
 
@@ -1084,7 +1084,7 @@ static u32 vfp_double_fdiv(int dd, int dn, int dm, u32 fpscr)
  vdn_nan:
        exceptions = vfp_propagate_nan(&vdd, &vdn, &vdm, fpscr);
  pack:
-       vfp_put_double(dd, vfp_double_pack(&vdd));
+       vfp_put_double(vfp_double_pack(&vdd), dd);
        return exceptions;
 
  vdm_nan:
@@ -1104,20 +1104,20 @@ static u32 vfp_double_fdiv(int dd, int dn, int dm, u32 fpscr)
        goto pack;
 
  invalid:
-       vfp_put_double(dd, vfp_double_pack(&vfp_double_default_qnan));
+       vfp_put_double(vfp_double_pack(&vfp_double_default_qnan), dd);
        return FPSCR_IOC;
 }
 
-static u32 (* const fop_fns[16])(int dd, int dn, int dm, u32 fpscr) = {
-       [FOP_TO_IDX(FOP_FMAC)]  = vfp_double_fmac,
-       [FOP_TO_IDX(FOP_FNMAC)] = vfp_double_fnmac,
-       [FOP_TO_IDX(FOP_FMSC)]  = vfp_double_fmsc,
-       [FOP_TO_IDX(FOP_FNMSC)] = vfp_double_fnmsc,
-       [FOP_TO_IDX(FOP_FMUL)]  = vfp_double_fmul,
-       [FOP_TO_IDX(FOP_FNMUL)] = vfp_double_fnmul,
-       [FOP_TO_IDX(FOP_FADD)]  = vfp_double_fadd,
-       [FOP_TO_IDX(FOP_FSUB)]  = vfp_double_fsub,
-       [FOP_TO_IDX(FOP_FDIV)]  = vfp_double_fdiv,
+static struct op fops[16] = {
+       [FOP_TO_IDX(FOP_FMAC)]  = { vfp_double_fmac,  0 },
+       [FOP_TO_IDX(FOP_FNMAC)] = { vfp_double_fnmac, 0 },
+       [FOP_TO_IDX(FOP_FMSC)]  = { vfp_double_fmsc,  0 },
+       [FOP_TO_IDX(FOP_FNMSC)] = { vfp_double_fnmsc, 0 },
+       [FOP_TO_IDX(FOP_FMUL)]  = { vfp_double_fmul,  0 },
+       [FOP_TO_IDX(FOP_FNMUL)] = { vfp_double_fnmul, 0 },
+       [FOP_TO_IDX(FOP_FADD)]  = { vfp_double_fadd,  0 },
+       [FOP_TO_IDX(FOP_FSUB)]  = { vfp_double_fsub,  0 },
+       [FOP_TO_IDX(FOP_FDIV)]  = { vfp_double_fdiv,  0 },
 };
 
 #define FREG_BANK(x)   ((x) & 0x0c)
@@ -1127,60 +1127,65 @@ u32 vfp_double_cpdo(u32 inst, u32 fpscr)
 {
        u32 op = inst & FOP_MASK;
        u32 exceptions = 0;
-       unsigned int dd = vfp_get_dd(inst);
+       unsigned int dest;
        unsigned int dn = vfp_get_dn(inst);
        unsigned int dm = vfp_get_dm(inst);
        unsigned int vecitr, veclen, vecstride;
-       u32 (*fop)(int, int, s32, u32);
+       struct op *fop;
 
-       veclen = fpscr & FPSCR_LENGTH_MASK;
        vecstride = (1 + ((fpscr & FPSCR_STRIDE_MASK) == FPSCR_STRIDE_MASK)) * 2;
 
+       fop = (op == FOP_EXT) ? &fops_ext[FEXT_TO_IDX(inst)] : &fops[FOP_TO_IDX(op)];
+
+       /*
+        * fcvtds takes an sN register number as destination, not dN.
+        * It also always operates on scalars.
+        */
+       if (fop->flags & OP_SD)
+               dest = vfp_get_sd(inst);
+       else
+               dest = vfp_get_dd(inst);
+
        /*
         * If destination bank is zero, vector length is always '1'.
         * ARM DDI0100F C5.1.3, C5.3.2.
         */
-       if (FREG_BANK(dd) == 0)
+       if ((fop->flags & OP_SCALAR) || (FREG_BANK(dest) == 0))
                veclen = 0;
+       else
+               veclen = fpscr & FPSCR_LENGTH_MASK;
 
        pr_debug("VFP: vecstride=%u veclen=%u\n", vecstride,
                 (veclen >> FPSCR_LENGTH_BIT) + 1);
 
-       fop = (op == FOP_EXT) ? fop_extfns[FEXT_TO_IDX(inst)] : fop_fns[FOP_TO_IDX(op)];
-       if (!fop)
+       if (!fop->fn)
                goto invalid;
 
        for (vecitr = 0; vecitr <= veclen; vecitr += 1 << FPSCR_LENGTH_BIT) {
                u32 except;
+               char type;
 
+               type = fop->flags & OP_SD ? 's' : 'd';
                if (op == FOP_EXT)
-                       pr_debug("VFP: itr%d (d%u) = op[%u] (d%u)\n",
+                       pr_debug("VFP: itr%d (%c%u) = op[%u] (d%u)\n",
                                 vecitr >> FPSCR_LENGTH_BIT,
-                                dd, dn, dm);
+                                type, dest, dn, dm);
                else
-                       pr_debug("VFP: itr%d (d%u) = (d%u) op[%u] (d%u)\n",
+                       pr_debug("VFP: itr%d (%c%u) = (d%u) op[%u] (d%u)\n",
                                 vecitr >> FPSCR_LENGTH_BIT,
-                                dd, dn, FOP_TO_IDX(op), dm);
+                                type, dest, dn, FOP_TO_IDX(op), dm);
 
-               except = fop(dd, dn, dm, fpscr);
+               except = fop->fn(dest, dn, dm, fpscr);
                pr_debug("VFP: itr%d: exceptions=%08x\n",
                         vecitr >> FPSCR_LENGTH_BIT, except);
 
                exceptions |= except;
 
-               /*
-                * This ensures that comparisons only operate on scalars;
-                * comparisons always return with one FPSCR status bit set.
-                */
-               if (except & (FPSCR_N|FPSCR_Z|FPSCR_C|FPSCR_V))
-                       break;
-
                /*
                 * CHECK: It appears to be undefined whether we stop when
                 * we encounter an exception.  We continue.
                 */
-
-               dd = FREG_BANK(dd) + ((FREG_IDX(dd) + vecstride) & 6);
+               dest = FREG_BANK(dest) + ((FREG_IDX(dest) + vecstride) & 6);
                dn = FREG_BANK(dn) + ((FREG_IDX(dn) + vecstride) & 6);
                if (FREG_BANK(dm) != 0)
                        dm = FREG_BANK(dm) + ((FREG_IDX(dm) + vecstride) & 6);