Merge branch 'common/fbdev' of master.kernel.org:/pub/scm/linux/kernel/git/lethal...

[sfrench/cifs-2.6.git] / arch / arm / plat-omap / include / plat / fpga.h

diff --git a/arch/arm/plat-omap/include/plat/fpga.h b/arch/arm/plat-omap/include/plat/fpga.h
index ae39bcb3f5baca9ebbcf4d1749accd6dc3037398..bd3c6324ae1f12b7a4b7e10495c800b9fc3083c5 100644 (file)
--- a/arch/arm/plat-omap/include/plat/fpga.h
+++ b/arch/arm/plat-omap/include/plat/fpga.h
@@ -30,18 +30,18 @@ extern void omap1510_fpga_init_irq(void);
  * ---------------------------------------------------------------------------
  */
 /* maps in the FPGA registers and the ETHR registers */
-#define H2P2_DBG_FPGA_BASE             IOMEM(0xE8000000)       /* VA */
+#define H2P2_DBG_FPGA_BASE             0xE8000000              /* VA */
 #define H2P2_DBG_FPGA_SIZE             SZ_4K                   /* SIZE */
 #define H2P2_DBG_FPGA_START            0x04000000              /* PA */
 
 #define H2P2_DBG_FPGA_ETHR_START       (H2P2_DBG_FPGA_START + 0x300)
-#define H2P2_DBG_FPGA_FPGA_REV         (H2P2_DBG_FPGA_BASE + 0x10)     /* FPGA Revision */
-#define H2P2_DBG_FPGA_BOARD_REV                (H2P2_DBG_FPGA_BASE + 0x12)     /* Board Revision */
-#define H2P2_DBG_FPGA_GPIO             (H2P2_DBG_FPGA_BASE + 0x14)     /* GPIO outputs */
-#define H2P2_DBG_FPGA_LEDS             (H2P2_DBG_FPGA_BASE + 0x16)     /* LEDs outputs */
-#define H2P2_DBG_FPGA_MISC_INPUTS      (H2P2_DBG_FPGA_BASE + 0x18)     /* Misc inputs */
-#define H2P2_DBG_FPGA_LAN_STATUS       (H2P2_DBG_FPGA_BASE + 0x1A)     /* LAN Status line */
-#define H2P2_DBG_FPGA_LAN_RESET                (H2P2_DBG_FPGA_BASE + 0x1C)     /* LAN Reset line */
+#define H2P2_DBG_FPGA_FPGA_REV         IOMEM(H2P2_DBG_FPGA_BASE + 0x10)        /* FPGA Revision */
+#define H2P2_DBG_FPGA_BOARD_REV                IOMEM(H2P2_DBG_FPGA_BASE + 0x12)        /* Board Revision */
+#define H2P2_DBG_FPGA_GPIO             IOMEM(H2P2_DBG_FPGA_BASE + 0x14)        /* GPIO outputs */
+#define H2P2_DBG_FPGA_LEDS             IOMEM(H2P2_DBG_FPGA_BASE + 0x16)        /* LEDs outputs */
+#define H2P2_DBG_FPGA_MISC_INPUTS      IOMEM(H2P2_DBG_FPGA_BASE + 0x18)        /* Misc inputs */
+#define H2P2_DBG_FPGA_LAN_STATUS       IOMEM(H2P2_DBG_FPGA_BASE + 0x1A)        /* LAN Status line */
+#define H2P2_DBG_FPGA_LAN_RESET                IOMEM(H2P2_DBG_FPGA_BASE + 0x1C)        /* LAN Reset line */
 
 /* NOTE:  most boards don't have a static mapping for the FPGA ... */
 struct h2p2_dbg_fpga {
@@ -81,55 +81,55 @@ struct h2p2_dbg_fpga {
  *  OMAP-1510 FPGA
  * ---------------------------------------------------------------------------
  */
-#define OMAP1510_FPGA_BASE             IOMEM(0xE8000000)       /* VA */
+#define OMAP1510_FPGA_BASE             0xE8000000              /* VA */
 #define OMAP1510_FPGA_SIZE             SZ_4K
 #define OMAP1510_FPGA_START            0x08000000              /* PA */
 
 /* Revision */
-#define OMAP1510_FPGA_REV_LOW                  (OMAP1510_FPGA_BASE + 0x0)
-#define OMAP1510_FPGA_REV_HIGH                 (OMAP1510_FPGA_BASE + 0x1)
+#define OMAP1510_FPGA_REV_LOW                  IOMEM(OMAP1510_FPGA_BASE + 0x0)
+#define OMAP1510_FPGA_REV_HIGH                 IOMEM(OMAP1510_FPGA_BASE + 0x1)
 
-#define OMAP1510_FPGA_LCD_PANEL_CONTROL                (OMAP1510_FPGA_BASE + 0x2)
-#define OMAP1510_FPGA_LED_DIGIT                        (OMAP1510_FPGA_BASE + 0x3)
-#define INNOVATOR_FPGA_HID_SPI                 (OMAP1510_FPGA_BASE + 0x4)
-#define OMAP1510_FPGA_POWER                    (OMAP1510_FPGA_BASE + 0x5)
+#define OMAP1510_FPGA_LCD_PANEL_CONTROL                IOMEM(OMAP1510_FPGA_BASE + 0x2)
+#define OMAP1510_FPGA_LED_DIGIT                        IOMEM(OMAP1510_FPGA_BASE + 0x3)
+#define INNOVATOR_FPGA_HID_SPI                 IOMEM(OMAP1510_FPGA_BASE + 0x4)
+#define OMAP1510_FPGA_POWER                    IOMEM(OMAP1510_FPGA_BASE + 0x5)
 
 /* Interrupt status */
-#define OMAP1510_FPGA_ISR_LO                   (OMAP1510_FPGA_BASE + 0x6)
-#define OMAP1510_FPGA_ISR_HI                   (OMAP1510_FPGA_BASE + 0x7)
+#define OMAP1510_FPGA_ISR_LO                   IOMEM(OMAP1510_FPGA_BASE + 0x6)
+#define OMAP1510_FPGA_ISR_HI                   IOMEM(OMAP1510_FPGA_BASE + 0x7)
 
 /* Interrupt mask */
-#define OMAP1510_FPGA_IMR_LO                   (OMAP1510_FPGA_BASE + 0x8)
-#define OMAP1510_FPGA_IMR_HI                   (OMAP1510_FPGA_BASE + 0x9)
+#define OMAP1510_FPGA_IMR_LO                   IOMEM(OMAP1510_FPGA_BASE + 0x8)
+#define OMAP1510_FPGA_IMR_HI                   IOMEM(OMAP1510_FPGA_BASE + 0x9)
 
 /* Reset registers */
-#define OMAP1510_FPGA_HOST_RESET               (OMAP1510_FPGA_BASE + 0xa)
-#define OMAP1510_FPGA_RST                      (OMAP1510_FPGA_BASE + 0xb)
-
-#define OMAP1510_FPGA_AUDIO                    (OMAP1510_FPGA_BASE + 0xc)
-#define OMAP1510_FPGA_DIP                      (OMAP1510_FPGA_BASE + 0xe)
-#define OMAP1510_FPGA_FPGA_IO                  (OMAP1510_FPGA_BASE + 0xf)
-#define OMAP1510_FPGA_UART1                    (OMAP1510_FPGA_BASE + 0x14)
-#define OMAP1510_FPGA_UART2                    (OMAP1510_FPGA_BASE + 0x15)
-#define OMAP1510_FPGA_OMAP1510_STATUS          (OMAP1510_FPGA_BASE + 0x16)
-#define OMAP1510_FPGA_BOARD_REV                        (OMAP1510_FPGA_BASE + 0x18)
-#define OMAP1510P1_PPT_DATA                    (OMAP1510_FPGA_BASE + 0x100)
-#define OMAP1510P1_PPT_STATUS                  (OMAP1510_FPGA_BASE + 0x101)
-#define OMAP1510P1_PPT_CONTROL                 (OMAP1510_FPGA_BASE + 0x102)
-
-#define OMAP1510_FPGA_TOUCHSCREEN              (OMAP1510_FPGA_BASE + 0x204)
-
-#define INNOVATOR_FPGA_INFO                    (OMAP1510_FPGA_BASE + 0x205)
-#define INNOVATOR_FPGA_LCD_BRIGHT_LO           (OMAP1510_FPGA_BASE + 0x206)
-#define INNOVATOR_FPGA_LCD_BRIGHT_HI           (OMAP1510_FPGA_BASE + 0x207)
-#define INNOVATOR_FPGA_LED_GRN_LO              (OMAP1510_FPGA_BASE + 0x208)
-#define INNOVATOR_FPGA_LED_GRN_HI              (OMAP1510_FPGA_BASE + 0x209)
-#define INNOVATOR_FPGA_LED_RED_LO              (OMAP1510_FPGA_BASE + 0x20a)
-#define INNOVATOR_FPGA_LED_RED_HI              (OMAP1510_FPGA_BASE + 0x20b)
-#define INNOVATOR_FPGA_CAM_USB_CONTROL         (OMAP1510_FPGA_BASE + 0x20c)
-#define INNOVATOR_FPGA_EXP_CONTROL             (OMAP1510_FPGA_BASE + 0x20d)
-#define INNOVATOR_FPGA_ISR2                    (OMAP1510_FPGA_BASE + 0x20e)
-#define INNOVATOR_FPGA_IMR2                    (OMAP1510_FPGA_BASE + 0x210)
+#define OMAP1510_FPGA_HOST_RESET               IOMEM(OMAP1510_FPGA_BASE + 0xa)
+#define OMAP1510_FPGA_RST                      IOMEM(OMAP1510_FPGA_BASE + 0xb)
+
+#define OMAP1510_FPGA_AUDIO                    IOMEM(OMAP1510_FPGA_BASE + 0xc)
+#define OMAP1510_FPGA_DIP                      IOMEM(OMAP1510_FPGA_BASE + 0xe)
+#define OMAP1510_FPGA_FPGA_IO                  IOMEM(OMAP1510_FPGA_BASE + 0xf)
+#define OMAP1510_FPGA_UART1                    IOMEM(OMAP1510_FPGA_BASE + 0x14)
+#define OMAP1510_FPGA_UART2                    IOMEM(OMAP1510_FPGA_BASE + 0x15)
+#define OMAP1510_FPGA_OMAP1510_STATUS          IOMEM(OMAP1510_FPGA_BASE + 0x16)
+#define OMAP1510_FPGA_BOARD_REV                        IOMEM(OMAP1510_FPGA_BASE + 0x18)
+#define OMAP1510P1_PPT_DATA                    IOMEM(OMAP1510_FPGA_BASE + 0x100)
+#define OMAP1510P1_PPT_STATUS                  IOMEM(OMAP1510_FPGA_BASE + 0x101)
+#define OMAP1510P1_PPT_CONTROL                 IOMEM(OMAP1510_FPGA_BASE + 0x102)
+
+#define OMAP1510_FPGA_TOUCHSCREEN              IOMEM(OMAP1510_FPGA_BASE + 0x204)
+
+#define INNOVATOR_FPGA_INFO                    IOMEM(OMAP1510_FPGA_BASE + 0x205)
+#define INNOVATOR_FPGA_LCD_BRIGHT_LO           IOMEM(OMAP1510_FPGA_BASE + 0x206)
+#define INNOVATOR_FPGA_LCD_BRIGHT_HI           IOMEM(OMAP1510_FPGA_BASE + 0x207)
+#define INNOVATOR_FPGA_LED_GRN_LO              IOMEM(OMAP1510_FPGA_BASE + 0x208)
+#define INNOVATOR_FPGA_LED_GRN_HI              IOMEM(OMAP1510_FPGA_BASE + 0x209)
+#define INNOVATOR_FPGA_LED_RED_LO              IOMEM(OMAP1510_FPGA_BASE + 0x20a)
+#define INNOVATOR_FPGA_LED_RED_HI              IOMEM(OMAP1510_FPGA_BASE + 0x20b)
+#define INNOVATOR_FPGA_CAM_USB_CONTROL         IOMEM(OMAP1510_FPGA_BASE + 0x20c)
+#define INNOVATOR_FPGA_EXP_CONTROL             IOMEM(OMAP1510_FPGA_BASE + 0x20d)
+#define INNOVATOR_FPGA_ISR2                    IOMEM(OMAP1510_FPGA_BASE + 0x20e)
+#define INNOVATOR_FPGA_IMR2                    IOMEM(OMAP1510_FPGA_BASE + 0x210)
 
 #define OMAP1510_FPGA_ETHR_START               (OMAP1510_FPGA_START + 0x300)