Merge branch 'next' of git://git.kernel.org/pub/scm/linux/kernel/git/rzhang/linux

[sfrench/cifs-2.6.git] / arch / arm / mm / proc-v7.S

diff --git a/arch/arm/mm/proc-v7.S b/arch/arm/mm/proc-v7.S
index d00d52c9de3e0228c34aeebb0ec86d4b280220f9..01d64c0b2563b7793f85827f4e4dad0cd9777f85 100644 (file)
--- a/arch/arm/mm/proc-v7.S
+++ b/arch/arm/mm/proc-v7.S
@@ -39,13 +39,14 @@ ENTRY(cpu_v7_proc_fin)
 ENDPROC(cpu_v7_proc_fin)
 
 /*
- *     cpu_v7_reset(loc)
+ *     cpu_v7_reset(loc, hyp)
  *
  *     Perform a soft reset of the system.  Put the CPU into the
  *     same state as it would be if it had been reset, and branch
  *     to what would be the reset vector.
  *
  *     - loc   - location to jump to for soft reset
+ *     - hyp   - indicate if restart occurs in HYP mode
  *
  *     This code must be executed using a flat identity mapping with
  *      caches disabled.
@@ -53,11 +54,15 @@ ENDPROC(cpu_v7_proc_fin)
        .align  5
        .pushsection    .idmap.text, "ax"
 ENTRY(cpu_v7_reset)
-       mrc     p15, 0, r1, c1, c0, 0           @ ctrl register
-       bic     r1, r1, #0x1                    @ ...............m
- THUMB(        bic     r1, r1, #1 << 30 )              @ SCTLR.TE (Thumb exceptions)
-       mcr     p15, 0, r1, c1, c0, 0           @ disable MMU
+       mrc     p15, 0, r2, c1, c0, 0           @ ctrl register
+       bic     r2, r2, #0x1                    @ ...............m
+ THUMB(        bic     r2, r2, #1 << 30 )              @ SCTLR.TE (Thumb exceptions)
+       mcr     p15, 0, r2, c1, c0, 0           @ disable MMU
        isb
+#ifdef CONFIG_ARM_VIRT_EXT
+       teq     r1, #0
+       bne     __hyp_soft_restart
+#endif
        bx      r0
 ENDPROC(cpu_v7_reset)
        .popsection