Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/dtor/input

[sfrench/cifs-2.6.git] / arch / arm / mm / proc-mohawk.S

diff --git a/arch/arm/mm/proc-mohawk.S b/arch/arm/mm/proc-mohawk.S
index 52b5fd74fbb3fcbfe3295d570a2e121001318562..9674d36cc97d4c1a6489599d2047b3c29ef58110 100644 (file)
--- a/arch/arm/mm/proc-mohawk.S
+++ b/arch/arm/mm/proc-mohawk.S
@@ -186,15 +186,16 @@ ENTRY(mohawk_coherent_user_range)
        mov     pc, lr
 
 /*
- *     flush_kern_dcache_page(void *page)
+ *     flush_kern_dcache_area(void *addr, size_t size)
  *
  *     Ensure no D cache aliasing occurs, either with itself or
  *     the I cache
  *
- *     - addr  - page aligned address
+ *     - addr  - kernel address
+ *     - size  - region size
  */
-ENTRY(mohawk_flush_kern_dcache_page)
-       add     r1, r0, #PAGE_SZ
+ENTRY(mohawk_flush_kern_dcache_area)
+       add     r1, r0, r1
 1:     mcr     p15, 0, r0, c7, c14, 1          @ clean+invalidate D entry
        add     r0, r0, #CACHE_DLINESIZE
        cmp     r0, r1
@@ -273,7 +274,7 @@ ENTRY(mohawk_cache_fns)
        .long   mohawk_flush_user_cache_range
        .long   mohawk_coherent_kern_range
        .long   mohawk_coherent_user_range
-       .long   mohawk_flush_kern_dcache_page
+       .long   mohawk_flush_kern_dcache_area
        .long   mohawk_dma_inv_range
        .long   mohawk_dma_clean_range
        .long   mohawk_dma_flush_range