ARM: convert all "mov.* pc, reg" to "bx reg" for ARMv6+

[sfrench/cifs-2.6.git] / arch / arm / mm / l2c-l2x0-resume.S

diff --git a/arch/arm/mm/l2c-l2x0-resume.S b/arch/arm/mm/l2c-l2x0-resume.S
index 99b05f21a59a4a9d6fe22852cf1526e4508bfa52..fda415e4ca8fe43e836d96f506241fa6b045aa89 100644 (file)
--- a/arch/arm/mm/l2c-l2x0-resume.S
+++ b/arch/arm/mm/l2c-l2x0-resume.S
@@ -6,6 +6,7 @@
  * This code can only be used to if you are running in the secure world.
  */
 #include <linux/linkage.h>
+#include <asm/assembler.h>
 #include <asm/hardware/cache-l2x0.h>
 
        .text
@@ -27,7 +28,7 @@ ENTRY(l2c310_early_resume)
 
        @ Check that the address has been initialised
        teq     r1, #0
-       moveq   pc, lr
+       reteq   lr
 
        @ The prefetch and power control registers are revision dependent
        @ and can be written whether or not the L2 cache is enabled
@@ -41,7 +42,7 @@ ENTRY(l2c310_early_resume)
        @ Don't setup the L2 cache if it is already enabled
        ldr     r0, [r1, #L2X0_CTRL]
        tst     r0, #L2X0_CTRL_EN
-       movne   pc, lr
+       retne   lr
 
        str     r3, [r1, #L310_TAG_LATENCY_CTRL]
        str     r4, [r1, #L310_DATA_LATENCY_CTRL]
@@ -51,7 +52,7 @@ ENTRY(l2c310_early_resume)
        str     r2, [r1, #L2X0_AUX_CTRL]
        mov     r9, #L2X0_CTRL_EN
        str     r9, [r1, #L2X0_CTRL]
-       mov     pc, lr
+       ret     lr
 ENDPROC(l2c310_early_resume)
 
        .align