Merge branch 'for-linus' of master.kernel.org:/home/rmk/linux-2.6-arm

[sfrench/cifs-2.6.git] / arch / arm / mm / fault-armv.c

diff --git a/arch/arm/mm/fault-armv.c b/arch/arm/mm/fault-armv.c
index be4ab3d73c91965448f064448136f7c078d9fb30..44558d5f9313c0e22d476bc07cd995c466666e66 100644 (file)
--- a/arch/arm/mm/fault-armv.c
+++ b/arch/arm/mm/fault-armv.c
@@ -26,6 +26,11 @@ static unsigned long shared_pte_mask = L_PTE_CACHEABLE;
 /*
  * We take the easy way out of this problem - we make the
  * PTE uncacheable.  However, we leave the write buffer on.
+ *
+ * Note that the pte lock held when calling update_mmu_cache must also
+ * guard the pte (somewhere else in the same mm) that we modify here.
+ * Therefore those configurations which might call adjust_pte (those
+ * without CONFIG_CPU_CACHE_VIPT) cannot support split page_table_lock.
  */
 static int adjust_pte(struct vm_area_struct *vma, unsigned long address)
 {
@@ -56,7 +61,7 @@ static int adjust_pte(struct vm_area_struct *vma, unsigned long address)
        if (pte_present(entry) && pte_val(entry) & shared_pte_mask) {
                flush_cache_page(vma, address, pte_pfn(entry));
                pte_val(entry) &= ~shared_pte_mask;
-               set_pte(pte, entry);
+               set_pte_at(vma->vm_mm, address, pte, entry);
                flush_tlb_page(vma, address);
                ret = 1;
        }
@@ -114,8 +119,6 @@ make_coherent(struct address_space *mapping, struct vm_area_struct *vma, unsigne
                flush_cache_page(vma, addr, pfn);
 }
 
-void __flush_dcache_page(struct address_space *mapping, struct page *page);
-
 /*
  * Take care of architecture specific things when placing a new PTE into
  * a page table, or changing an existing PTE.  Basically, there are two
@@ -127,7 +130,7 @@ void __flush_dcache_page(struct address_space *mapping, struct page *page);
  *  2. If we have multiple shared mappings of the same space in
  *     an object, we need to deal with the cache aliasing issues.
  *
- * Note that the page_table_lock will be held.
+ * Note that the pte lock will be held.
  */
 void update_mmu_cache(struct vm_area_struct *vma, unsigned long addr, pte_t pte)
 {