Merge branches 'armv7', 'at91', 'misc' and 'omap' into devel

[sfrench/cifs-2.6.git] / arch / arm / mm / context.c

diff --git a/arch/arm/mm/context.c b/arch/arm/mm/context.c
index 9da43a0fdcdffc5ff09b4e8fd1bdf6d95ac0452b..fc84fcc743804d16241a99ee5cb1c86f650dd048 100644 (file)
--- a/arch/arm/mm/context.c
+++ b/arch/arm/mm/context.c
@@ -14,7 +14,8 @@
 #include <asm/mmu_context.h>
 #include <asm/tlbflush.h>
 
-unsigned int cpu_last_asid = { 1 << ASID_BITS };
+static DEFINE_SPINLOCK(cpu_asid_lock);
+unsigned int cpu_last_asid = ASID_FIRST_VERSION;
 
 /*
  * We fork()ed a process, and we need a new context for the child
@@ -31,15 +32,16 @@ void __new_context(struct mm_struct *mm)
 {
        unsigned int asid;
 
+       spin_lock(&cpu_asid_lock);
        asid = ++cpu_last_asid;
        if (asid == 0)
-               asid = cpu_last_asid = 1 << ASID_BITS;
+               asid = cpu_last_asid = ASID_FIRST_VERSION;
 
        /*
         * If we've used up all our ASIDs, we need
         * to start a new version and flush the TLB.
         */
-       if ((asid & ~ASID_MASK) == 0) {
+       if (unlikely((asid & ~ASID_MASK) == 0)) {
                asid = ++cpu_last_asid;
                /* set the reserved ASID before flushing the TLB */
                asm("mcr        p15, 0, %0, c13, c0, 1  @ set reserved context ID\n"
@@ -47,7 +49,16 @@ void __new_context(struct mm_struct *mm)
                    : "r" (0));
                isb();
                flush_tlb_all();
+               if (icache_is_vivt_asid_tagged()) {
+                       asm("mcr        p15, 0, %0, c7, c5, 0   @ invalidate I-cache\n"
+                           "mcr        p15, 0, %0, c7, c5, 6   @ flush BTAC/BTB\n"
+                           :
+                           : "r" (0));
+                       dsb();
+               }
        }
+       spin_unlock(&cpu_asid_lock);
 
+       mm->cpu_vm_mask = cpumask_of_cpu(smp_processor_id());
        mm->context.id = asid;
 }