Merge branch 'devel-stable' into devel

[sfrench/cifs-2.6.git] / arch / arm / mm / Kconfig

diff --git a/arch/arm/mm/Kconfig b/arch/arm/mm/Kconfig
index 3e62aae2225aabc6e642def4dc82bdb25a7dd6ad..346ae14824a5ea96365f6e9b66fa8f78cd8cd4bc 100644 (file)
--- a/arch/arm/mm/Kconfig
+++ b/arch/arm/mm/Kconfig
@@ -762,7 +762,8 @@ config CACHE_FEROCEON_L2_WRITETHROUGH
 config CACHE_L2X0
        bool "Enable the L2x0 outer cache controller"
        depends on REALVIEW_EB_ARM11MP || MACH_REALVIEW_PB11MP || MACH_REALVIEW_PB1176 || \
-                  REALVIEW_EB_A9MP || ARCH_MX35 || ARCH_MX31 || MACH_REALVIEW_PBX || ARCH_NOMADIK || ARCH_OMAP4
+                  REALVIEW_EB_A9MP || ARCH_MX35 || ARCH_MX31 || MACH_REALVIEW_PBX || \
+                  ARCH_NOMADIK || ARCH_OMAP4 || ARCH_U8500 || ARCH_VEXPRESS_CA9X4
        default y
        select OUTER_CACHE
        select OUTER_CACHE_SYNC
@@ -791,6 +792,25 @@ config ARM_L1_CACHE_SHIFT
        default 6 if ARM_L1_CACHE_SHIFT_6
        default 5
 
+config ARM_DMA_MEM_BUFFERABLE
+       bool "Use non-cacheable memory for DMA" if CPU_V6 && !CPU_V7
+       default y if CPU_V6 || CPU_V7
+       help
+         Historically, the kernel has used strongly ordered mappings to
+         provide DMA coherent memory.  With the advent of ARMv7, mapping
+         memory with differing types results in unpredictable behaviour,
+         so on these CPUs, this option is forced on.
+
+         Multiple mappings with differing attributes is also unpredictable
+         on ARMv6 CPUs, but since they do not have aggressive speculative
+         prefetch, no harm appears to occur.
+
+         However, drivers may be missing the necessary barriers for ARMv6,
+         and therefore turning this on may result in unpredictable driver
+         behaviour.  Therefore, we offer this as an option.
+
+         You are recommended say 'Y' here and debug any affected drivers.
+
 config ARCH_HAS_BARRIERS
        bool
        help