Merge branches 'fixes', 'pgt-next' and 'versatile' into devel
[sfrench/cifs-2.6.git] / arch / arm / mach-vexpress / ct-ca9x4.c
index fd25ccd7272f7045b24a193f4c025a84c3bca97b..30d5a5b0ac2172b9cd123ff89ef669cfbb6b281c 100644 (file)
@@ -8,8 +8,8 @@
 #include <linux/platform_device.h>
 #include <linux/amba/bus.h>
 #include <linux/amba/clcd.h>
+#include <linux/clkdev.h>
 
-#include <asm/clkdev.h>
 #include <asm/pgtable.h>
 #include <asm/hardware/arm_timer.h>
 #include <asm/hardware/cache-l2x0.h>
 #include <asm/pmu.h>
 #include <asm/smp_twd.h>
 
-#include <mach/clkdev.h>
 #include <mach/ct-ca9x4.h>
 
-#include <plat/timer-sp.h>
+#include <asm/hardware/timer-sp.h>
 
 #include <asm/mach/arch.h>
 #include <asm/mach/map.h>
@@ -31,6 +30,8 @@
 
 #include <mach/motherboard.h>
 
+#include <plat/clcd.h>
+
 #define V2M_PA_CS7     0x10000000
 
 static struct map_desc ct_ca9x4_io_desc[] __initdata = {
@@ -60,13 +61,10 @@ static void __init ct_ca9x4_map_io(void)
        v2m_map_io(ct_ca9x4_io_desc, ARRAY_SIZE(ct_ca9x4_io_desc));
 }
 
-void __iomem *gic_cpu_base_addr;
-
 static void __init ct_ca9x4_init_irq(void)
 {
-       gic_cpu_base_addr = MMIO_P2V(A9_MPCORE_GIC_CPU);
-       gic_dist_init(0, MMIO_P2V(A9_MPCORE_GIC_DIST), 29);
-       gic_cpu_init(0, gic_cpu_base_addr);
+       gic_init(0, 29, MMIO_P2V(A9_MPCORE_GIC_DIST),
+                MMIO_P2V(A9_MPCORE_GIC_CPU));
 }
 
 #if 0
@@ -84,29 +82,6 @@ static struct sys_timer ct_ca9x4_timer = {
 };
 #endif
 
-static struct clcd_panel xvga_panel = {
-       .mode           = {
-               .name           = "XVGA",
-               .refresh        = 60,
-               .xres           = 1024,
-               .yres           = 768,
-               .pixclock       = 15384,
-               .left_margin    = 168,
-               .right_margin   = 8,
-               .upper_margin   = 29,
-               .lower_margin   = 3,
-               .hsync_len      = 144,
-               .vsync_len      = 6,
-               .sync           = 0,
-               .vmode          = FB_VMODE_NONINTERLACED,
-       },
-       .width          = -1,
-       .height         = -1,
-       .tim2           = TIM2_BCD | TIM2_IPC,
-       .cntl           = CNTL_LCDTFT | CNTL_BGR | CNTL_LCDVCOMP(1),
-       .bpp            = 16,
-};
-
 static void ct_ca9x4_clcd_enable(struct clcd_fb *fb)
 {
        v2m_cfg_write(SYS_CFG_MUXFPGA | SYS_CFG_SITE_DB1, 0);
@@ -116,42 +91,23 @@ static void ct_ca9x4_clcd_enable(struct clcd_fb *fb)
 static int ct_ca9x4_clcd_setup(struct clcd_fb *fb)
 {
        unsigned long framesize = 1024 * 768 * 2;
-       dma_addr_t dma;
 
-       fb->panel = &xvga_panel;
+       fb->panel = versatile_clcd_get_panel("XVGA");
+       if (!fb->panel)
+               return -EINVAL;
 
-       fb->fb.screen_base = dma_alloc_writecombine(&fb->dev->dev, framesize,
-                               &dma, GFP_KERNEL);
-       if (!fb->fb.screen_base) {
-               printk(KERN_ERR "CLCD: unable to map frame buffer\n");
-               return -ENOMEM;
-       }
-       fb->fb.fix.smem_start = dma;
-       fb->fb.fix.smem_len = framesize;
-
-       return 0;
-}
-
-static int ct_ca9x4_clcd_mmap(struct clcd_fb *fb, struct vm_area_struct *vma)
-{
-       return dma_mmap_writecombine(&fb->dev->dev, vma, fb->fb.screen_base,
-               fb->fb.fix.smem_start, fb->fb.fix.smem_len);
-}
-
-static void ct_ca9x4_clcd_remove(struct clcd_fb *fb)
-{
-       dma_free_writecombine(&fb->dev->dev, fb->fb.fix.smem_len,
-               fb->fb.screen_base, fb->fb.fix.smem_start);
+       return versatile_clcd_setup_dma(fb, framesize);
 }
 
 static struct clcd_board ct_ca9x4_clcd_data = {
        .name           = "CT-CA9X4",
+       .caps           = CLCD_CAP_5551 | CLCD_CAP_565,
        .check          = clcdfb_check,
        .decode         = clcdfb_decode,
        .enable         = ct_ca9x4_clcd_enable,
        .setup          = ct_ca9x4_clcd_setup,
-       .mmap           = ct_ca9x4_clcd_mmap,
-       .remove         = ct_ca9x4_clcd_remove,
+       .mmap           = versatile_clcd_mmap_dma,
+       .remove         = versatile_clcd_remove_dma,
 };
 
 static AMBA_DEVICE(clcd, "ct:clcd", CT_CA9X4_CLCDC, &ct_ca9x4_clcd_data);
@@ -224,6 +180,13 @@ static struct platform_device pmu_device = {
        .resource       = pmu_resources,
 };
 
+static void __init ct_ca9x4_init_early(void)
+{
+       clkdev_add_table(lookups, ARRAY_SIZE(lookups));
+
+       v2m_init_early();
+}
+
 static void __init ct_ca9x4_init(void)
 {
        int i;
@@ -238,8 +201,6 @@ static void __init ct_ca9x4_init(void)
        l2x0_init(l2x0_base, 0x00400000, 0xfe0fffff);
 #endif
 
-       clkdev_add_table(lookups, ARRAY_SIZE(lookups));
-
        for (i = 0; i < ARRAY_SIZE(ct_ca9x4_amba_devs); i++)
                amba_device_register(ct_ca9x4_amba_devs[i], &iomem_resource);
 
@@ -247,9 +208,10 @@ static void __init ct_ca9x4_init(void)
 }
 
 MACHINE_START(VEXPRESS, "ARM-Versatile Express CA9x4")
-       .boot_params    = PHYS_OFFSET + 0x00000100,
+       .boot_params    = PLAT_PHYS_OFFSET + 0x00000100,
        .map_io         = ct_ca9x4_map_io,
        .init_irq       = ct_ca9x4_init_irq,
+       .init_early     = ct_ca9x4_init_early,
 #if 0
        .timer          = &ct_ca9x4_timer,
 #else