Merge tag 'renesas-sh-sci-for-v3.11' of git://git.kernel.org/pub/scm/linux/kernel...
[sfrench/cifs-2.6.git] / arch / arm / mach-shmobile / setup-r8a7790.c
index 6531f3d3a69690b95612466f75503d852a7b720c..28f94752b8ff0f2e86024d19c0f1471d02f9d1d5 100644 (file)
 #include <linux/kernel.h>
 #include <linux/of_platform.h>
 #include <linux/serial_sci.h>
+#include <linux/platform_data/gpio-rcar.h>
 #include <linux/platform_data/irq-renesas-irqc.h>
 #include <mach/common.h>
 #include <mach/irqs.h>
 #include <mach/r8a7790.h>
 #include <asm/mach/arch.h>
 
-static const struct resource pfc_resources[] = {
+static struct resource pfc_resources[] __initdata = {
        DEFINE_RES_MEM(0xe6060000, 0x250),
-       DEFINE_RES_MEM(0xe6050000, 0x5050),
 };
 
+#define R8A7790_GPIO(idx)                                              \
+static struct resource r8a7790_gpio##idx##_resources[] __initdata = {  \
+       DEFINE_RES_MEM(0xe6050000 + 0x1000 * (idx), 0x50),              \
+       DEFINE_RES_IRQ(gic_spi(4 + (idx))),                             \
+};                                                                     \
+                                                                       \
+static struct gpio_rcar_config r8a7790_gpio##idx##_platform_data __initdata = {        \
+       .gpio_base      = 32 * (idx),                                   \
+       .irq_base       = 0,                                            \
+       .number_of_pins = 32,                                           \
+       .pctl_name      = "pfc-r8a7790",                                \
+       .has_both_edge_trigger = 1,                                     \
+};                                                                     \
+
+R8A7790_GPIO(0);
+R8A7790_GPIO(1);
+R8A7790_GPIO(2);
+R8A7790_GPIO(3);
+R8A7790_GPIO(4);
+R8A7790_GPIO(5);
+
+#define r8a7790_register_gpio(idx)                                     \
+       platform_device_register_resndata(&platform_bus, "gpio_rcar", idx, \
+               r8a7790_gpio##idx##_resources,                          \
+               ARRAY_SIZE(r8a7790_gpio##idx##_resources),              \
+               &r8a7790_gpio##idx##_platform_data,                     \
+               sizeof(r8a7790_gpio##idx##_platform_data))
+
 void __init r8a7790_pinmux_init(void)
 {
        platform_device_register_simple("pfc-r8a7790", -1, pfc_resources,
                                        ARRAY_SIZE(pfc_resources));
+       r8a7790_register_gpio(0);
+       r8a7790_register_gpio(1);
+       r8a7790_register_gpio(2);
+       r8a7790_register_gpio(3);
+       r8a7790_register_gpio(4);
+       r8a7790_register_gpio(5);
 }
 
 #define SCIF_COMMON(scif_type, baseaddr, irq)                  \
@@ -77,7 +111,7 @@ void __init r8a7790_pinmux_init(void)
 enum { SCIFA0, SCIFA1, SCIFB0, SCIFB1, SCIFB2, SCIFA2, SCIF0, SCIF1,
        HSCIF0, HSCIF1 };
 
-static const struct plat_sci_port scif[] = {
+static struct plat_sci_port scif[] __initdata = {
        SCIFA_DATA(SCIFA0, 0xe6c40000, gic_spi(144)), /* SCIFA0 */
        SCIFA_DATA(SCIFA1, 0xe6c50000, gic_spi(145)), /* SCIFA1 */
        SCIFB_DATA(SCIFB0, 0xe6c20000, gic_spi(148)), /* SCIFB0 */
@@ -96,11 +130,11 @@ static inline void r8a7790_register_scif(int idx)
                                      sizeof(struct plat_sci_port));
 }
 
-static struct renesas_irqc_config irqc0_data = {
+static struct renesas_irqc_config irqc0_data __initdata = {
        .irq_base = irq_pin(0), /* IRQ0 -> IRQ3 */
 };
 
-static struct resource irqc0_resources[] = {
+static struct resource irqc0_resources[] __initdata = {
        DEFINE_RES_MEM(0xe61c0000, 0x200), /* IRQC Event Detector Block_0 */
        DEFINE_RES_IRQ(gic_spi(0)), /* IRQ0 */
        DEFINE_RES_IRQ(gic_spi(1)), /* IRQ1 */