ARM: S3C24XX: convert s3c2440 and s3c2442 to common clock framework
[sfrench/cifs-2.6.git] / arch / arm / mach-s3c24xx / common.c
index 64b6eda380a4dd2859de3337a22823b8e12ddcde..bda9dd4abae34ce28134ba20cb5a7034f0724ebc 100644 (file)
@@ -53,6 +53,7 @@
 #include <plat/cpu-freq.h>
 #include <plat/pll.h>
 #include <plat/pwm-core.h>
+#include <plat/watchdog-reset.h>
 
 #include "common.h"
 
@@ -91,7 +92,6 @@ static struct cpu_table cpu_ids[] __initdata = {
                .idcode         = 0x32440000,
                .idmask         = 0xffffffff,
                .map_io         = s3c2440_map_io,
-               .init_clocks    = s3c244x_init_clocks,
                .init_uarts     = s3c244x_init_uarts,
                .init           = s3c2440_init,
                .name           = name_s3c2440
@@ -100,7 +100,6 @@ static struct cpu_table cpu_ids[] __initdata = {
                .idcode         = 0x32440001,
                .idmask         = 0xffffffff,
                .map_io         = s3c2440_map_io,
-               .init_clocks    = s3c244x_init_clocks,
                .init_uarts     = s3c244x_init_uarts,
                .init           = s3c2440_init,
                .name           = name_s3c2440a
@@ -109,7 +108,6 @@ static struct cpu_table cpu_ids[] __initdata = {
                .idcode         = 0x32440aaa,
                .idmask         = 0xffffffff,
                .map_io         = s3c2442_map_io,
-               .init_clocks    = s3c244x_init_clocks,
                .init_uarts     = s3c244x_init_uarts,
                .init           = s3c2442_init,
                .name           = name_s3c2442
@@ -118,7 +116,6 @@ static struct cpu_table cpu_ids[] __initdata = {
                .idcode         = 0x32440aab,
                .idmask         = 0xffffffff,
                .map_io         = s3c2442_map_io,
-               .init_clocks    = s3c244x_init_clocks,
                .init_uarts     = s3c244x_init_uarts,
                .init           = s3c2442_init,
                .name           = name_s3c2442b
@@ -127,7 +124,6 @@ static struct cpu_table cpu_ids[] __initdata = {
                .idcode         = 0x32412001,
                .idmask         = 0xffffffff,
                .map_io         = s3c2412_map_io,
-               .init_clocks    = s3c2412_init_clocks,
                .init_uarts     = s3c2412_init_uarts,
                .init           = s3c2412_init,
                .name           = name_s3c2412,
@@ -136,7 +132,6 @@ static struct cpu_table cpu_ids[] __initdata = {
                .idcode         = 0x32412003,
                .idmask         = 0xffffffff,
                .map_io         = s3c2412_map_io,
-               .init_clocks    = s3c2412_init_clocks,
                .init_uarts     = s3c2412_init_uarts,
                .init           = s3c2412_init,
                .name           = name_s3c2412,
@@ -145,7 +140,6 @@ static struct cpu_table cpu_ids[] __initdata = {
                .idcode         = 0x32450003,
                .idmask         = 0xffffffff,
                .map_io         = s3c2416_map_io,
-               .init_clocks    = s3c2416_init_clocks,
                .init_uarts     = s3c2416_init_uarts,
                .init           = s3c2416_init,
                .name           = name_s3c2416,
@@ -154,7 +148,6 @@ static struct cpu_table cpu_ids[] __initdata = {
                .idcode         = 0x32443001,
                .idmask         = 0xffffffff,
                .map_io         = s3c2443_map_io,
-               .init_clocks    = s3c2443_init_clocks,
                .init_uarts     = s3c2443_init_uarts,
                .init           = s3c2443_init,
                .name           = name_s3c2443,
@@ -318,6 +311,7 @@ struct s3c24xx_uart_resources s3c2410_uart_resources[] __initdata = {
 
 /* initialise all the clocks */
 
+#ifdef CONFIG_SAMSUNG_CLOCK
 void __init_or_cpufreq s3c24xx_setup_clocks(unsigned long fclk,
                                           unsigned long hclk,
                                           unsigned long pclk)
@@ -330,6 +324,7 @@ void __init_or_cpufreq s3c24xx_setup_clocks(unsigned long fclk,
        clk_p.rate = pclk;
        clk_f.rate = fclk;
 }
+#endif
 
 #if defined(CONFIG_CPU_S3C2410) || defined(CONFIG_CPU_S3C2412) || \
        defined(CONFIG_CPU_S3C2440) || defined(CONFIG_CPU_S3C2442)
@@ -483,7 +478,7 @@ struct platform_device s3c2440_device_dma = {
 };
 #endif
 
-#if defined(CONFIG_CPUS_3C2443) || defined(CONFIG_CPU_S3C2416)
+#if defined(CONFIG_CPU_S3C2443) || defined(CONFIG_CPU_S3C2416)
 static struct resource s3c2443_dma_resource[] = {
        [0] = DEFINE_RES_MEM(S3C24XX_PA_DMA, S3C24XX_SZ_DMA),
        [1] = DEFINE_RES_IRQ(IRQ_S3C2443_DMA0),
@@ -534,3 +529,62 @@ struct platform_device s3c2443_device_dma = {
        },
 };
 #endif
+
+#if defined(CONFIG_COMMON_CLK) && defined(CONFIG_CPU_S3C2410)
+void __init s3c2410_init_clocks(int xtal)
+{
+       s3c2410_common_clk_init(NULL, xtal, 0, S3C24XX_VA_CLKPWR);
+       samsung_wdt_reset_init(S3C24XX_VA_WATCHDOG);
+}
+#endif
+
+#ifdef CONFIG_CPU_S3C2412
+void __init s3c2412_init_clocks(int xtal)
+{
+       s3c2412_common_clk_init(NULL, xtal, 0, S3C24XX_VA_CLKPWR);
+}
+#endif
+
+#ifdef CONFIG_CPU_S3C2416
+void __init s3c2416_init_clocks(int xtal)
+{
+       s3c2443_common_clk_init(NULL, xtal, 0, S3C24XX_VA_CLKPWR);
+}
+#endif
+
+#if defined(CONFIG_COMMON_CLK) && defined(CONFIG_CPU_S3C2440)
+void __init s3c2440_init_clocks(int xtal)
+{
+       s3c2410_common_clk_init(NULL, xtal, 1, S3C24XX_VA_CLKPWR);
+       samsung_wdt_reset_init(S3C24XX_VA_WATCHDOG);
+}
+#endif
+
+#if defined(CONFIG_COMMON_CLK) && defined(CONFIG_CPU_S3C2442)
+void __init s3c2442_init_clocks(int xtal)
+{
+       s3c2410_common_clk_init(NULL, xtal, 2, S3C24XX_VA_CLKPWR);
+       samsung_wdt_reset_init(S3C24XX_VA_WATCHDOG);
+}
+#endif
+
+#ifdef CONFIG_CPU_S3C2443
+void __init s3c2443_init_clocks(int xtal)
+{
+       s3c2443_common_clk_init(NULL, xtal, 1, S3C24XX_VA_CLKPWR);
+}
+#endif
+
+#if defined(CONFIG_CPU_S3C2410) || defined(CONFIG_CPU_S3C2440) || \
+       defined(CONFIG_CPU_S3C2442)
+static struct resource s3c2410_dclk_resource[] = {
+       [0] = DEFINE_RES_MEM(0x56000084, 0x4),
+};
+
+struct platform_device s3c2410_device_dclk = {
+       .name           = "s3c2410-dclk",
+       .id             = 0,
+       .num_resources  = ARRAY_SIZE(s3c2410_dclk_resource),
+       .resource       = s3c2410_dclk_resource,
+};
+#endif