Merge branch 'i2c-embedded/for-next' of git://git.pengutronix.de/git/wsa/linux

[sfrench/cifs-2.6.git] / arch / arm / mach-omap2 / i2c.c

diff --git a/arch/arm/mach-omap2/i2c.c b/arch/arm/mach-omap2/i2c.c
index fc57e67b321f3900b38f95df939f796eac8ef33b..df6d6acbc9edad84fe830a40b59cc90c48fcec7f 100644 (file)
--- a/arch/arm/mach-omap2/i2c.c
+++ b/arch/arm/mach-omap2/i2c.c
@@ -19,21 +19,23 @@
  *
  */
 
-#include <plat/i2c.h>
-#include "common.h"
-#include <plat/omap_hwmod.h>
+#include "soc.h"
+#include "omap_hwmod.h"
+#include "omap_device.h"
 
+#include "prm.h"
+#include "common.h"
 #include "mux.h"
+#include "i2c.h"
 
 /* In register I2C_CON, Bit 15 is the I2C enable bit */
 #define I2C_EN                                 BIT(15)
 #define OMAP2_I2C_CON_OFFSET                   0x24
 #define OMAP4_I2C_CON_OFFSET                   0xA4
 
-/* Maximum microseconds to wait for OMAP module to softreset */
-#define MAX_MODULE_SOFTRESET_WAIT      10000
+#define MAX_OMAP_I2C_HWMOD_NAME_LEN    16
 
-void __init omap2_i2c_mux_pins(int bus_id)
+static void __init omap2_i2c_mux_pins(int bus_id)
 {
        char mux_name[sizeof("i2c2_scl.i2c2_scl")];
 
@@ -104,3 +106,81 @@ int omap_i2c_reset(struct omap_hwmod *oh)
 
        return 0;
 }
+
+static int __init omap_i2c_nr_ports(void)
+{
+       int ports = 0;
+
+       if (cpu_is_omap24xx())
+               ports = 2;
+       else if (cpu_is_omap34xx())
+               ports = 3;
+       else if (cpu_is_omap44xx())
+               ports = 4;
+       return ports;
+}
+
+/*
+ * XXX This function is a temporary compatibility wrapper - only
+ * needed until the I2C driver can be converted to call
+ * omap_pm_set_max_dev_wakeup_lat() and handle a return code.
+ */
+static void omap_pm_set_max_mpu_wakeup_lat_compat(struct device *dev, long t)
+{
+       omap_pm_set_max_mpu_wakeup_lat(dev, t);
+}
+
+static const char name[] = "omap_i2c";
+
+int __init omap_i2c_add_bus(struct omap_i2c_bus_platform_data *i2c_pdata,
+                               int bus_id)
+{
+       int l;
+       struct omap_hwmod *oh;
+       struct platform_device *pdev;
+       char oh_name[MAX_OMAP_I2C_HWMOD_NAME_LEN];
+       struct omap_i2c_bus_platform_data *pdata;
+       struct omap_i2c_dev_attr *dev_attr;
+
+       if (bus_id > omap_i2c_nr_ports())
+               return -EINVAL;
+
+       omap2_i2c_mux_pins(bus_id);
+
+       l = snprintf(oh_name, MAX_OMAP_I2C_HWMOD_NAME_LEN, "i2c%d", bus_id);
+       WARN(l >= MAX_OMAP_I2C_HWMOD_NAME_LEN,
+               "String buffer overflow in I2C%d device setup\n", bus_id);
+       oh = omap_hwmod_lookup(oh_name);
+       if (!oh) {
+                       pr_err("Could not look up %s\n", oh_name);
+                       return -EEXIST;
+       }
+
+       pdata = i2c_pdata;
+       /*
+        * pass the hwmod class's CPU-specific knowledge of I2C IP revision in
+        * use, and functionality implementation flags, up to the OMAP I2C
+        * driver via platform data
+        */
+       pdata->rev = oh->class->rev;
+
+       dev_attr = (struct omap_i2c_dev_attr *)oh->dev_attr;
+       pdata->flags = dev_attr->flags;
+
+       /*
+        * When waiting for completion of a i2c transfer, we need to
+        * set a wake up latency constraint for the MPU. This is to
+        * ensure quick enough wakeup from idle, when transfer
+        * completes.
+        * Only omap3 has support for constraints
+        */
+       if (cpu_is_omap34xx())
+               pdata->set_mpu_wkup_lat = omap_pm_set_max_mpu_wakeup_lat_compat;
+       pdev = omap_device_build(name, bus_id, oh, pdata,
+                       sizeof(struct omap_i2c_bus_platform_data),
+                       NULL, 0, 0);
+       WARN(IS_ERR(pdev), "Could not build omap_device for %s\n", name);
+
+       return PTR_RET(pdev);
+}
+