ARM: avoid faulting on qemu

[sfrench/cifs-2.6.git] / arch / arm / kernel / entry-header.S

diff --git a/arch/arm/kernel/entry-header.S b/arch/arm/kernel/entry-header.S
index 75f7a4e8541a9c824b6d578cdbf0cfed1fa79f4d..e056c9a9aa9db178ba47ec421f2e8d1f53d3cab4 100644 (file)
--- a/arch/arm/kernel/entry-header.S
+++ b/arch/arm/kernel/entry-header.S
@@ -299,7 +299,7 @@
        mov     r2, sp
        ldr     r1, [r2, #\offset + S_PSR]      @ get calling cpsr
        ldr     lr, [r2, #\offset + S_PC]!      @ get pc
-       tst     r1, #0xcf
+       tst     r1, #PSR_I_BIT | 0x0f
        bne     1f
        msr     spsr_cxsf, r1                   @ save in spsr_svc
 #if defined(CONFIG_CPU_V6) || defined(CONFIG_CPU_32v6K)
@@ -331,7 +331,7 @@
        ldr     r1, [sp, #\offset + S_PSR]      @ get calling cpsr
        ldr     lr, [sp, #\offset + S_PC]       @ get pc
        add     sp, sp, #\offset + S_SP
-       tst     r1, #0xcf
+       tst     r1, #PSR_I_BIT | 0x0f
        bne     1f
        msr     spsr_cxsf, r1                   @ save in spsr_svc