ARM: entry: no need to increase preempt count for IRQ handlers

[sfrench/cifs-2.6.git] / arch / arm / kernel / entry-armv.S

diff --git a/arch/arm/kernel/entry-armv.S b/arch/arm/kernel/entry-armv.S
index 90c62cd51ca9ffc891f7c95336b1c2017097d512..1e5f387c70ae04cc88bb15734a4b642f003948ae 100644 (file)
--- a/arch/arm/kernel/entry-armv.S
+++ b/arch/arm/kernel/entry-armv.S
@@ -44,6 +44,37 @@
 9997:
        .endm
 
+       .macro  pabt_helper
+       mov     r0, r2                  @ pass address of aborted instruction.
+#ifdef MULTI_PABORT
+       ldr     ip, .LCprocfns
+       mov     lr, pc
+       ldr     pc, [ip, #PROCESSOR_PABT_FUNC]
+#else
+       bl      CPU_PABORT_HANDLER
+#endif
+       .endm
+
+       .macro  dabt_helper
+
+       @
+       @ Call the processor-specific abort handler:
+       @
+       @  r2 - aborted context pc
+       @  r3 - aborted context cpsr
+       @
+       @ The abort handler must return the aborted address in r0, and
+       @ the fault status register in r1.  r9 must be preserved.
+       @
+#ifdef MULTI_DABORT
+       ldr     ip, .LCprocfns
+       mov     lr, pc
+       ldr     pc, [ip, #PROCESSOR_DABT_FUNC]
+#else
+       bl      CPU_DABORT_HANDLER
+#endif
+       .endm
+
 #ifdef CONFIG_KPROBES
        .section        .kprobes.text,"ax",%progbits
 #else
@@ -159,22 +190,7 @@ __dabt_svc:
        tst     r3, #PSR_I_BIT
        biceq   r9, r9, #PSR_I_BIT
 
-       @
-       @ Call the processor-specific abort handler:
-       @
-       @  r2 - aborted context pc
-       @  r3 - aborted context cpsr
-       @
-       @ The abort handler must return the aborted address in r0, and
-       @ the fault status register in r1.  r9 must be preserved.
-       @
-#ifdef MULTI_DABORT
-       ldr     r4, .LCprocfns
-       mov     lr, pc
-       ldr     pc, [r4, #PROCESSOR_DABT_FUNC]
-#else
-       bl      CPU_DABORT_HANDLER
-#endif
+       dabt_helper
 
        @
        @ set desired IRQ state, then call main handler
@@ -204,16 +220,12 @@ __irq_svc:
 #ifdef CONFIG_TRACE_IRQFLAGS
        bl      trace_hardirqs_off
 #endif
-#ifdef CONFIG_PREEMPT
-       get_thread_info tsk
-       ldr     r8, [tsk, #TI_PREEMPT]          @ get preempt count
-       add     r7, r8, #1                      @ increment it
-       str     r7, [tsk, #TI_PREEMPT]
-#endif
 
        irq_handler
+
 #ifdef CONFIG_PREEMPT
-       str     r8, [tsk, #TI_PREEMPT]          @ restore preempt count
+       get_thread_info tsk
+       ldr     r8, [tsk, #TI_PREEMPT]          @ get preempt count
        ldr     r0, [tsk, #TI_FLAGS]            @ get flags
        teq     r8, #0                          @ if preempt count != 0
        movne   r0, #0                          @ force flags to 0
@@ -298,14 +310,7 @@ __pabt_svc:
        tst     r3, #PSR_I_BIT
        biceq   r9, r9, #PSR_I_BIT
 
-       mov     r0, r2                  @ pass address of aborted instruction.
-#ifdef MULTI_PABORT
-       ldr     r4, .LCprocfns
-       mov     lr, pc
-       ldr     pc, [r4, #PROCESSOR_PABT_FUNC]
-#else
-       bl      CPU_PABORT_HANDLER
-#endif
+       pabt_helper
        debug_entry r1
        msr     cpsr_c, r9                      @ Maybe enable interrupts
        mov     r2, sp                          @ regs
@@ -401,23 +406,7 @@ ENDPROC(__pabt_svc)
 __dabt_usr:
        usr_entry
        kuser_cmpxchg_check
-
-       @
-       @ Call the processor-specific abort handler:
-       @
-       @  r2 - aborted context pc
-       @  r3 - aborted context cpsr
-       @
-       @ The abort handler must return the aborted address in r0, and
-       @ the fault status register in r1.
-       @
-#ifdef MULTI_DABORT
-       ldr     r4, .LCprocfns
-       mov     lr, pc
-       ldr     pc, [r4, #PROCESSOR_DABT_FUNC]
-#else
-       bl      CPU_DABORT_HANDLER
-#endif
+       dabt_helper
 
        @
        @ IRQs on, then call the main handler
@@ -439,23 +428,8 @@ __irq_usr:
        bl      trace_hardirqs_off
 #endif
 
-       get_thread_info tsk
-#ifdef CONFIG_PREEMPT
-       ldr     r8, [tsk, #TI_PREEMPT]          @ get preempt count
-       add     r7, r8, #1                      @ increment it
-       str     r7, [tsk, #TI_PREEMPT]
-#endif
-
        irq_handler
-#ifdef CONFIG_PREEMPT
-       ldr     r0, [tsk, #TI_PREEMPT]
-       str     r8, [tsk, #TI_PREEMPT]
-       teq     r0, r7
- ARM(  strne   r0, [r0, -r0]   )
- THUMB(        movne   r0, #0          )
- THUMB(        strne   r0, [r0]        )
-#endif
-
+       get_thread_info tsk
        mov     why, #0
        b       ret_to_user_from_irq
  UNWIND(.fnend         )
@@ -682,15 +656,7 @@ ENDPROC(__und_usr_unknown)
        .align  5
 __pabt_usr:
        usr_entry
-
-       mov     r0, r2                  @ pass address of aborted instruction.
-#ifdef MULTI_PABORT
-       ldr     r4, .LCprocfns
-       mov     lr, pc
-       ldr     pc, [r4, #PROCESSOR_PABT_FUNC]
-#else
-       bl      CPU_PABORT_HANDLER
-#endif
+       pabt_helper
        debug_entry r1
        enable_irq                              @ Enable interrupts
        mov     r2, sp                          @ regs