Merge tag 'armsoc-late' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
[sfrench/cifs-2.6.git] / arch / arm / boot / dts / tegra124.dtsi
index e4eac1f01e645f608e16483a0e37086ad1a2df91..ea4811870de271b0cd74f0caa8173535d86d7d3d 100644 (file)
@@ -2,7 +2,6 @@
 #include <dt-bindings/gpio/tegra-gpio.h>
 #include <dt-bindings/memory/tegra124-mc.h>
 #include <dt-bindings/pinctrl/pinctrl-tegra.h>
-#include <dt-bindings/pinctrl/pinctrl-tegra-xusb.h>
 #include <dt-bindings/interrupt-controller/arm-gic.h>
 #include <dt-bindings/reset/tegra124-car.h>
 #include <dt-bindings/thermal/tegra124-soctherm.h>
@@ -51,9 +50,6 @@
                reset-names = "pex", "afi", "pcie_x";
                status = "disabled";
 
-               phys = <&padctl TEGRA_XUSB_PADCTL_PCIE>;
-               phy-names = "pcie";
-
                pci@1,0 {
                        device_type = "pci";
                        assigned-addresses = <0x82000800 0 0x01000000 0 0x1000>;
                         <&tegra_car 123>,
                         <&tegra_car 129>;
                reset-names = "sata", "sata-oob", "sata-cold";
-               phys = <&padctl TEGRA_XUSB_PADCTL_SATA>;
-               phy-names = "sata-phy";
                status = "disabled";
        };
 
                status = "disabled";
        };
 
+       usb@0,70090000 {
+               compatible = "nvidia,tegra124-xusb";
+               reg = <0x0 0x70090000 0x0 0x8000>,
+                     <0x0 0x70098000 0x0 0x1000>,
+                     <0x0 0x70099000 0x0 0x1000>;
+               reg-names = "hcd", "fpci", "ipfs";
+
+               interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>,
+                            <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>;
+
+               clocks = <&tegra_car TEGRA124_CLK_XUSB_HOST>,
+                        <&tegra_car TEGRA124_CLK_XUSB_HOST_SRC>,
+                        <&tegra_car TEGRA124_CLK_XUSB_FALCON_SRC>,
+                        <&tegra_car TEGRA124_CLK_XUSB_SS>,
+                        <&tegra_car TEGRA124_CLK_XUSB_SS_DIV2>,
+                        <&tegra_car TEGRA124_CLK_XUSB_SS_SRC>,
+                        <&tegra_car TEGRA124_CLK_XUSB_HS_SRC>,
+                        <&tegra_car TEGRA124_CLK_XUSB_FS_SRC>,
+                        <&tegra_car TEGRA124_CLK_PLL_U_480M>,
+                        <&tegra_car TEGRA124_CLK_CLK_M>,
+                        <&tegra_car TEGRA124_CLK_PLL_E>;
+               clock-names = "xusb_host", "xusb_host_src",
+                             "xusb_falcon_src", "xusb_ss",
+                             "xusb_ss_div2", "xusb_ss_src",
+                             "xusb_hs_src", "xusb_fs_src",
+                             "pll_u_480m", "clk_m", "pll_e";
+               resets = <&tegra_car 89>, <&tegra_car 156>,
+                        <&tegra_car 143>;
+               reset-names = "xusb_host", "xusb_ss", "xusb_src";
+
+               nvidia,xusb-padctl = <&padctl>;
+
+               status = "disabled";
+       };
+
        padctl: padctl@0,7009f000 {
                compatible = "nvidia,tegra124-xusb-padctl";
                reg = <0x0 0x7009f000 0x0 0x1000>;
                resets = <&tegra_car 142>;
                reset-names = "padctl";
 
-               #phy-cells = <1>;
+               pads {
+                       usb2 {
+                               status = "disabled";
+
+                               lanes {
+                                       usb2-0 {
+                                               status = "disabled";
+                                               #phy-cells = <0>;
+                                       };
+
+                                       usb2-1 {
+                                               status = "disabled";
+                                               #phy-cells = <0>;
+                                       };
+
+                                       usb2-2 {
+                                               status = "disabled";
+                                               #phy-cells = <0>;
+                                       };
+                               };
+                       };
+
+                       ulpi {
+                               status = "disabled";
+
+                               lanes {
+                                       ulpi-0 {
+                                               status = "disabled";
+                                               #phy-cells = <0>;
+                                       };
+                               };
+                       };
+
+                       hsic {
+                               status = "disabled";
+
+                               lanes {
+                                       hsic-0 {
+                                               status = "disabled";
+                                               #phy-cells = <0>;
+                                       };
+
+                                       hsic-1 {
+                                               status = "disabled";
+                                               #phy-cells = <0>;
+                                       };
+                               };
+                       };
+
+                       pcie {
+                               status = "disabled";
+
+                               lanes {
+                                       pcie-0 {
+                                               status = "disabled";
+                                               #phy-cells = <0>;
+                                       };
+
+                                       pcie-1 {
+                                               status = "disabled";
+                                               #phy-cells = <0>;
+                                       };
+
+                                       pcie-2 {
+                                               status = "disabled";
+                                               #phy-cells = <0>;
+                                       };
+
+                                       pcie-3 {
+                                               status = "disabled";
+                                               #phy-cells = <0>;
+                                       };
+
+                                       pcie-4 {
+                                               status = "disabled";
+                                               #phy-cells = <0>;
+                                       };
+                               };
+                       };
+
+                       sata {
+                               status = "disabled";
+
+                               lanes {
+                                       sata-0 {
+                                               status = "disabled";
+                                               #phy-cells = <0>;
+                                       };
+                               };
+                       };
+               };
+
+               ports {
+                       usb2-0 {
+                               status = "disabled";
+                       };
+
+                       usb2-1 {
+                               status = "disabled";
+                       };
+
+                       usb2-2 {
+                               status = "disabled";
+                       };
+
+                       ulpi-0 {
+                               status = "disabled";
+                       };
+
+                       hsic-0 {
+                               status = "disabled";
+                       };
+
+                       hsic-1 {
+                               status = "disabled";
+                       };
+
+                       usb3-0 {
+                               status = "disabled";
+                       };
+
+                       usb3-1 {
+                               status = "disabled";
+                       };
+               };
        };
 
        sdhci@0,700b0000 {