Merge tag 'pstore-v4.8-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/kees...
[sfrench/cifs-2.6.git] / arch / arm / boot / dts / tegra124.dtsi
index ea4811870de271b0cd74f0caa8173535d86d7d3d..ea340f9de44802124829153b7065691a83b3bc12 100644 (file)
@@ -14,7 +14,7 @@
        #address-cells = <2>;
        #size-cells = <2>;
 
-       pcie-controller@0,01003000 {
+       pcie-controller@01003000 {
                compatible = "nvidia,tegra124-pcie";
                device_type = "pci";
                reg = <0x0 0x01003000 0x0 0x00000800   /* PADS registers */
@@ -77,7 +77,7 @@
                };
        };
 
-       host1x@0,50000000 {
+       host1x@50000000 {
                compatible = "nvidia,tegra124-host1x", "simple-bus";
                reg = <0x0 0x50000000 0x0 0x00034000>;
                interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>, /* syncpt */
@@ -91,7 +91,7 @@
 
                ranges = <0 0x54000000 0 0x54000000 0 0x01000000>;
 
-               dc@0,54200000 {
+               dc@54200000 {
                        compatible = "nvidia,tegra124-dc";
                        reg = <0x0 0x54200000 0x0 0x00040000>;
                        interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
                        nvidia,head = <0>;
                };
 
-               dc@0,54240000 {
+               dc@54240000 {
                        compatible = "nvidia,tegra124-dc";
                        reg = <0x0 0x54240000 0x0 0x00040000>;
                        interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>;
                        nvidia,head = <1>;
                };
 
-               hdmi@0,54280000 {
+               hdmi@54280000 {
                        compatible = "nvidia,tegra124-hdmi";
                        reg = <0x0 0x54280000 0x0 0x00040000>;
                        interrupts = <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>;
                        status = "disabled";
                };
 
-               sor@0,54540000 {
+               sor@54540000 {
                        compatible = "nvidia,tegra124-sor";
                        reg = <0x0 0x54540000 0x0 0x00040000>;
                        interrupts = <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>;
                        status = "disabled";
                };
 
-               dpaux: dpaux@0,545c0000 {
+               dpaux: dpaux@545c0000 {
                        compatible = "nvidia,tegra124-dpaux";
                        reg = <0x0 0x545c0000 0x0 0x00040000>;
                        interrupts = <GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>;
                };
        };
 
-       gic: interrupt-controller@0,50041000 {
+       gic: interrupt-controller@50041000 {
                compatible = "arm,cortex-a15-gic";
                #interrupt-cells = <3>;
                interrupt-controller;
                interrupt-parent = <&gic>;
        };
 
+       /*
+        * Please keep the following 0, notation in place as a former mainline
+        * U-Boot version was looking for that particular notation in order to
+        * perform required fix-ups on that GPU node.
+        */
        gpu@0,57000000 {
                compatible = "nvidia,gk20a";
                reg = <0x0 0x57000000 0x0 0x01000000>,
                interrupt-parent = <&gic>;
        };
 
-       timer@0,60005000 {
+       timer@60005000 {
                compatible = "nvidia,tegra124-timer", "nvidia,tegra30-timer", "nvidia,tegra20-timer";
                reg = <0x0 0x60005000 0x0 0x400>;
                interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
                clocks = <&tegra_car TEGRA124_CLK_TIMER>;
        };
 
-       tegra_car: clock@0,60006000 {
+       tegra_car: clock@60006000 {
                compatible = "nvidia,tegra124-car";
                reg = <0x0 0x60006000 0x0 0x1000>;
                #clock-cells = <1>;
                nvidia,external-memory-controller = <&emc>;
        };
 
-       flow-controller@0,60007000 {
+       flow-controller@60007000 {
                compatible = "nvidia,tegra124-flowctrl";
                reg = <0x0 0x60007000 0x0 0x1000>;
        };
 
-       actmon@0,6000c800 {
+       actmon@6000c800 {
                compatible = "nvidia,tegra124-actmon";
                reg = <0x0 0x6000c800 0x0 0x400>;
                interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>;
                reset-names = "actmon";
        };
 
-       gpio: gpio@0,6000d000 {
+       gpio: gpio@6000d000 {
                compatible = "nvidia,tegra124-gpio", "nvidia,tegra30-gpio";
                reg = <0x0 0x6000d000 0x0 0x1000>;
                interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>,
                */
        };
 
-       apbdma: dma@0,60020000 {
+       apbdma: dma@60020000 {
                compatible = "nvidia,tegra124-apbdma", "nvidia,tegra148-apbdma";
                reg = <0x0 0x60020000 0x0 0x1400>;
                interrupts = <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>,
                #dma-cells = <1>;
        };
 
-       apbmisc@0,70000800 {
+       apbmisc@70000800 {
                compatible = "nvidia,tegra124-apbmisc", "nvidia,tegra20-apbmisc";
                reg = <0x0 0x70000800 0x0 0x64>,   /* Chip revision */
                      <0x0 0x7000e864 0x0 0x04>;   /* Strapping options */
        };
 
-       pinmux: pinmux@0,70000868 {
+       pinmux: pinmux@70000868 {
                compatible = "nvidia,tegra124-pinmux";
                reg = <0x0 0x70000868 0x0 0x164>, /* Pad control registers */
                      <0x0 0x70003000 0x0 0x434>, /* Mux registers */
         * the APB DMA based serial driver, the compatible is
         * "nvidia,tegra124-hsuart", "nvidia,tegra30-hsuart".
         */
-       uarta: serial@0,70006000 {
+       uarta: serial@70006000 {
                compatible = "nvidia,tegra124-uart", "nvidia,tegra20-uart";
                reg = <0x0 0x70006000 0x0 0x40>;
                reg-shift = <2>;
                status = "disabled";
        };
 
-       uartb: serial@0,70006040 {
+       uartb: serial@70006040 {
                compatible = "nvidia,tegra124-uart", "nvidia,tegra20-uart";
                reg = <0x0 0x70006040 0x0 0x40>;
                reg-shift = <2>;
                status = "disabled";
        };
 
-       uartc: serial@0,70006200 {
+       uartc: serial@70006200 {
                compatible = "nvidia,tegra124-uart", "nvidia,tegra20-uart";
                reg = <0x0 0x70006200 0x0 0x40>;
                reg-shift = <2>;
                status = "disabled";
        };
 
-       uartd: serial@0,70006300 {
+       uartd: serial@70006300 {
                compatible = "nvidia,tegra124-uart", "nvidia,tegra20-uart";
                reg = <0x0 0x70006300 0x0 0x40>;
                reg-shift = <2>;
                status = "disabled";
        };
 
-       pwm: pwm@0,7000a000 {
+       pwm: pwm@7000a000 {
                compatible = "nvidia,tegra124-pwm", "nvidia,tegra20-pwm";
                reg = <0x0 0x7000a000 0x0 0x100>;
                #pwm-cells = <2>;
                status = "disabled";
        };
 
-       i2c@0,7000c000 {
+       i2c@7000c000 {
                compatible = "nvidia,tegra124-i2c", "nvidia,tegra114-i2c";
                reg = <0x0 0x7000c000 0x0 0x100>;
                interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>;
                status = "disabled";
        };
 
-       i2c@0,7000c400 {
+       i2c@7000c400 {
                compatible = "nvidia,tegra124-i2c", "nvidia,tegra114-i2c";
                reg = <0x0 0x7000c400 0x0 0x100>;
                interrupts = <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>;
                status = "disabled";
        };
 
-       i2c@0,7000c500 {
+       i2c@7000c500 {
                compatible = "nvidia,tegra124-i2c", "nvidia,tegra114-i2c";
                reg = <0x0 0x7000c500 0x0 0x100>;
                interrupts = <GIC_SPI 92 IRQ_TYPE_LEVEL_HIGH>;
                status = "disabled";
        };
 
-       i2c@0,7000c700 {
+       i2c@7000c700 {
                compatible = "nvidia,tegra124-i2c", "nvidia,tegra114-i2c";
                reg = <0x0 0x7000c700 0x0 0x100>;
                interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>;
                status = "disabled";
        };
 
-       i2c@0,7000d000 {
+       i2c@7000d000 {
                compatible = "nvidia,tegra124-i2c", "nvidia,tegra114-i2c";
                reg = <0x0 0x7000d000 0x0 0x100>;
                interrupts = <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>;
                status = "disabled";
        };
 
-       i2c@0,7000d100 {
+       i2c@7000d100 {
                compatible = "nvidia,tegra124-i2c", "nvidia,tegra114-i2c";
                reg = <0x0 0x7000d100 0x0 0x100>;
                interrupts = <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>;
                status = "disabled";
        };
 
-       spi@0,7000d400 {
+       spi@7000d400 {
                compatible = "nvidia,tegra124-spi", "nvidia,tegra114-spi";
                reg = <0x0 0x7000d400 0x0 0x200>;
                interrupts = <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>;
                status = "disabled";
        };
 
-       spi@0,7000d600 {
+       spi@7000d600 {
                compatible = "nvidia,tegra124-spi", "nvidia,tegra114-spi";
                reg = <0x0 0x7000d600 0x0 0x200>;
                interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>;
                status = "disabled";
        };
 
-       spi@0,7000d800 {
+       spi@7000d800 {
                compatible = "nvidia,tegra124-spi", "nvidia,tegra114-spi";
                reg = <0x0 0x7000d800 0x0 0x200>;
                interrupts = <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>;
                status = "disabled";
        };
 
-       spi@0,7000da00 {
+       spi@7000da00 {
                compatible = "nvidia,tegra124-spi", "nvidia,tegra114-spi";
                reg = <0x0 0x7000da00 0x0 0x200>;
                interrupts = <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>;
                status = "disabled";
        };
 
-       spi@0,7000dc00 {
+       spi@7000dc00 {
                compatible = "nvidia,tegra124-spi", "nvidia,tegra114-spi";
                reg = <0x0 0x7000dc00 0x0 0x200>;
                interrupts = <GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH>;
                status = "disabled";
        };
 
-       spi@0,7000de00 {
+       spi@7000de00 {
                compatible = "nvidia,tegra124-spi", "nvidia,tegra114-spi";
                reg = <0x0 0x7000de00 0x0 0x200>;
                interrupts = <GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH>;
                status = "disabled";
        };
 
-       rtc@0,7000e000 {
+       rtc@7000e000 {
                compatible = "nvidia,tegra124-rtc", "nvidia,tegra20-rtc";
                reg = <0x0 0x7000e000 0x0 0x100>;
                interrupts = <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>;
                clocks = <&tegra_car TEGRA124_CLK_RTC>;
        };
 
-       pmc@0,7000e400 {
+       pmc@7000e400 {
                compatible = "nvidia,tegra124-pmc";
                reg = <0x0 0x7000e400 0x0 0x400>;
                clocks = <&tegra_car TEGRA124_CLK_PCLK>, <&clk32k_in>;
                clock-names = "pclk", "clk32k_in";
        };
 
-       fuse@0,7000f800 {
+       fuse@7000f800 {
                compatible = "nvidia,tegra124-efuse";
                reg = <0x0 0x7000f800 0x0 0x400>;
                clocks = <&tegra_car TEGRA124_CLK_FUSE>;
                reset-names = "fuse";
        };
 
-       mc: memory-controller@0,70019000 {
+       mc: memory-controller@70019000 {
                compatible = "nvidia,tegra124-mc";
                reg = <0x0 0x70019000 0x0 0x1000>;
                clocks = <&tegra_car TEGRA124_CLK_MC>;
                #iommu-cells = <1>;
        };
 
-       emc: emc@0,7001b000 {
+       emc: emc@7001b000 {
                compatible = "nvidia,tegra124-emc";
                reg = <0x0 0x7001b000 0x0 0x1000>;
 
                nvidia,memory-controller = <&mc>;
        };
 
-       sata@0,70020000 {
+       sata@70020000 {
                compatible = "nvidia,tegra124-ahci";
                reg = <0x0 0x70027000 0x0 0x2000>, /* AHCI */
                      <0x0 0x70020000 0x0 0x7000>; /* SATA */
                status = "disabled";
        };
 
-       hda@0,70030000 {
+       hda@70030000 {
                compatible = "nvidia,tegra124-hda", "nvidia,tegra30-hda";
                reg = <0x0 0x70030000 0x0 0x10000>;
                interrupts = <GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH>;
                status = "disabled";
        };
 
-       usb@0,70090000 {
+       usb@70090000 {
                compatible = "nvidia,tegra124-xusb";
                reg = <0x0 0x70090000 0x0 0x8000>,
                      <0x0 0x70098000 0x0 0x1000>,
                status = "disabled";
        };
 
-       padctl: padctl@0,7009f000 {
+       padctl: padctl@7009f000 {
                compatible = "nvidia,tegra124-xusb-padctl";
                reg = <0x0 0x7009f000 0x0 0x1000>;
                resets = <&tegra_car 142>;
                };
        };
 
-       sdhci@0,700b0000 {
+       sdhci@700b0000 {
                compatible = "nvidia,tegra124-sdhci";
                reg = <0x0 0x700b0000 0x0 0x200>;
                interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>;
                status = "disabled";
        };
 
-       sdhci@0,700b0200 {
+       sdhci@700b0200 {
                compatible = "nvidia,tegra124-sdhci";
                reg = <0x0 0x700b0200 0x0 0x200>;
                interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>;
                status = "disabled";
        };
 
-       sdhci@0,700b0400 {
+       sdhci@700b0400 {
                compatible = "nvidia,tegra124-sdhci";
                reg = <0x0 0x700b0400 0x0 0x200>;
                interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
                status = "disabled";
        };
 
-       sdhci@0,700b0600 {
+       sdhci@700b0600 {
                compatible = "nvidia,tegra124-sdhci";
                reg = <0x0 0x700b0600 0x0 0x200>;
                interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
                status = "disabled";
        };
 
-       soctherm: thermal-sensor@0,700e2000 {
+       soctherm: thermal-sensor@700e2000 {
                compatible = "nvidia,tegra124-soctherm";
                reg = <0x0 0x700e2000 0x0 0x1000>;
                interrupts = <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>;
                #thermal-sensor-cells = <1>;
        };
 
-       dfll: clock@0,70110000 {
+       dfll: clock@70110000 {
                compatible = "nvidia,tegra124-dfll";
                reg = <0 0x70110000 0 0x100>, /* DFLL control */
                      <0 0x70110000 0 0x100>, /* I2C output control */
                status = "disabled";
        };
 
-       ahub@0,70300000 {
+       ahub@70300000 {
                compatible = "nvidia,tegra124-ahub";
                reg = <0x0 0x70300000 0x0 0x200>,
                      <0x0 0x70300800 0x0 0x800>,
                #address-cells = <2>;
                #size-cells = <2>;
 
-               tegra_i2s0: i2s@0,70301000 {
+               tegra_i2s0: i2s@70301000 {
                        compatible = "nvidia,tegra124-i2s";
                        reg = <0x0 0x70301000 0x0 0x100>;
                        nvidia,ahub-cif-ids = <4 4>;
                        status = "disabled";
                };
 
-               tegra_i2s1: i2s@0,70301100 {
+               tegra_i2s1: i2s@70301100 {
                        compatible = "nvidia,tegra124-i2s";
                        reg = <0x0 0x70301100 0x0 0x100>;
                        nvidia,ahub-cif-ids = <5 5>;
                        status = "disabled";
                };
 
-               tegra_i2s2: i2s@0,70301200 {
+               tegra_i2s2: i2s@70301200 {
                        compatible = "nvidia,tegra124-i2s";
                        reg = <0x0 0x70301200 0x0 0x100>;
                        nvidia,ahub-cif-ids = <6 6>;
                        status = "disabled";
                };
 
-               tegra_i2s3: i2s@0,70301300 {
+               tegra_i2s3: i2s@70301300 {
                        compatible = "nvidia,tegra124-i2s";
                        reg = <0x0 0x70301300 0x0 0x100>;
                        nvidia,ahub-cif-ids = <7 7>;
                        status = "disabled";
                };
 
-               tegra_i2s4: i2s@0,70301400 {
+               tegra_i2s4: i2s@70301400 {
                        compatible = "nvidia,tegra124-i2s";
                        reg = <0x0 0x70301400 0x0 0x100>;
                        nvidia,ahub-cif-ids = <8 8>;
                };
        };
 
-       usb@0,7d000000 {
+       usb@7d000000 {
                compatible = "nvidia,tegra124-ehci", "nvidia,tegra30-ehci", "usb-ehci";
                reg = <0x0 0x7d000000 0x0 0x4000>;
                interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
                status = "disabled";
        };
 
-       phy1: usb-phy@0,7d000000 {
+       phy1: usb-phy@7d000000 {
                compatible = "nvidia,tegra124-usb-phy", "nvidia,tegra30-usb-phy";
                reg = <0x0 0x7d000000 0x0 0x4000>,
                      <0x0 0x7d000000 0x0 0x4000>;
                status = "disabled";
        };
 
-       usb@0,7d004000 {
+       usb@7d004000 {
                compatible = "nvidia,tegra124-ehci", "nvidia,tegra30-ehci", "usb-ehci";
                reg = <0x0 0x7d004000 0x0 0x4000>;
                interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
                status = "disabled";
        };
 
-       phy2: usb-phy@0,7d004000 {
+       phy2: usb-phy@7d004000 {
                compatible = "nvidia,tegra124-usb-phy", "nvidia,tegra30-usb-phy";
                reg = <0x0 0x7d004000 0x0 0x4000>,
                      <0x0 0x7d000000 0x0 0x4000>;
                status = "disabled";
        };
 
-       usb@0,7d008000 {
+       usb@7d008000 {
                compatible = "nvidia,tegra124-ehci", "nvidia,tegra30-ehci", "usb-ehci";
                reg = <0x0 0x7d008000 0x0 0x4000>;
                interrupts = <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>;
                status = "disabled";
        };
 
-       phy3: usb-phy@0,7d008000 {
+       phy3: usb-phy@7d008000 {
                compatible = "nvidia,tegra124-usb-phy", "nvidia,tegra30-usb-phy";
                reg = <0x0 0x7d008000 0x0 0x4000>,
                      <0x0 0x7d000000 0x0 0x4000>;