Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/jikos/hid

[sfrench/cifs-2.6.git] / arch / arm / boot / dts / sun5i-a13.dtsi

diff --git a/arch/arm/boot/dts/sun5i-a13.dtsi b/arch/arm/boot/dts/sun5i-a13.dtsi
index 4131ab44558bac931a3ccba70e30da9a7f8f069c..fb2ddb9a04c9e8487da6a14975aa9d8ec0c34f70 100644 (file)
--- a/arch/arm/boot/dts/sun5i-a13.dtsi
+++ b/arch/arm/boot/dts/sun5i-a13.dtsi
@@ -61,8 +61,8 @@
                        compatible = "allwinner,simple-framebuffer",
                                     "simple-framebuffer";
                        allwinner,pipeline = "de_be0-lcd0";
-                       clocks = <&ahb_gates 36>, <&ahb_gates 44>, <&de_be_clk>,
-                                <&tcon_ch0_clk>, <&dram_gates 26>;
+                       clocks = <&ccu CLK_AHB_LCD>, <&ccu CLK_AHB_DE_BE>, <&ccu CLK_DE_BE>,
+                                <&ccu CLK_TCON_CH0>, <&ccu CLK_DRAM_DE_BE>;
                        status = "disabled";
                };
        };
@@ -99,114 +99,6 @@
                };
        };
 
-       clocks {
-               ahb_gates: clk@01c20060 {
-                       #clock-cells = <1>;
-                       compatible = "allwinner,sun5i-a13-ahb-gates-clk";
-                       reg = <0x01c20060 0x8>;
-                       clocks = <&ahb>;
-                       clock-indices = <0>, <1>,
-                                       <2>, <5>, <6>,
-                                       <7>, <8>, <9>,
-                                       <10>, <13>,
-                                       <14>, <20>,
-                                       <21>, <22>,
-                                       <28>, <32>, <34>,
-                                       <36>, <40>, <44>,
-                                       <46>, <51>,
-                                       <52>;
-                       clock-output-names = "ahb_usbotg", "ahb_ehci",
-                                            "ahb_ohci", "ahb_ss", "ahb_dma",
-                                            "ahb_bist", "ahb_mmc0", "ahb_mmc1",
-                                            "ahb_mmc2", "ahb_nand",
-                                            "ahb_sdram", "ahb_spi0",
-                                            "ahb_spi1", "ahb_spi2",
-                                            "ahb_stimer", "ahb_ve", "ahb_tve",
-                                            "ahb_lcd", "ahb_csi", "ahb_de_be",
-                                            "ahb_de_fe", "ahb_iep",
-                                            "ahb_mali400";
-               };
-
-               apb0_gates: clk@01c20068 {
-                       #clock-cells = <1>;
-                       compatible = "allwinner,sun5i-a13-apb0-gates-clk";
-                       reg = <0x01c20068 0x4>;
-                       clocks = <&apb0>;
-                       clock-indices = <0>, <5>,
-                                       <6>;
-                       clock-output-names = "apb0_codec", "apb0_pio",
-                                            "apb0_ir";
-               };
-
-               apb1_gates: clk@01c2006c {
-                       #clock-cells = <1>;
-                       compatible = "allwinner,sun5i-a13-apb1-gates-clk";
-                       reg = <0x01c2006c 0x4>;
-                       clocks = <&apb1>;
-                       clock-indices = <0>, <1>,
-                                       <2>, <17>,
-                                       <19>;
-                       clock-output-names = "apb1_i2c0", "apb1_i2c1",
-                                            "apb1_i2c2", "apb1_uart1",
-                                            "apb1_uart3";
-               };
-
-               dram_gates: clk@01c20100 {
-                       #clock-cells = <1>;
-                       compatible = "allwinner,sun5i-a13-dram-gates-clk",
-                                    "allwinner,sun4i-a10-gates-clk";
-                       reg = <0x01c20100 0x4>;
-                       clocks = <&pll5 0>;
-                       clock-indices = <0>,
-                                       <1>,
-                                       <25>,
-                                       <26>,
-                                       <29>,
-                                       <31>;
-                       clock-output-names = "dram_ve",
-                                            "dram_csi",
-                                            "dram_de_fe",
-                                            "dram_de_be",
-                                            "dram_ace",
-                                            "dram_iep";
-               };
-
-               de_be_clk: clk@01c20104 {
-                       #clock-cells = <0>;
-                       #reset-cells = <0>;
-                       compatible = "allwinner,sun4i-a10-display-clk";
-                       reg = <0x01c20104 0x4>;
-                       clocks = <&pll3>, <&pll7>, <&pll5 1>;
-                       clock-output-names = "de-be";
-               };
-
-               de_fe_clk: clk@01c2010c {
-                       #clock-cells = <0>;
-                       #reset-cells = <0>;
-                       compatible = "allwinner,sun4i-a10-display-clk";
-                       reg = <0x01c2010c 0x4>;
-                       clocks = <&pll3>, <&pll7>, <&pll5 1>;
-                       clock-output-names = "de-fe";
-               };
-
-               tcon_ch0_clk: clk@01c20118 {
-                       #clock-cells = <0>;
-                       #reset-cells = <1>;
-                       compatible = "allwinner,sun4i-a10-tcon-ch0-clk";
-                       reg = <0x01c20118 0x4>;
-                       clocks = <&pll3>, <&pll7>, <&pll3x2>, <&pll7x2>;
-                       clock-output-names = "tcon-ch0-sclk";
-               };
-
-               tcon_ch1_clk: clk@01c2012c {
-                       #clock-cells = <0>;
-                       compatible = "allwinner,sun4i-a10-tcon-ch1-clk";
-                       reg = <0x01c2012c 0x4>;
-                       clocks = <&pll3>, <&pll7>, <&pll3x2>, <&pll7x2>;
-                       clock-output-names = "tcon-ch1-sclk";
-               };
-       };
-
        display-engine {
                compatible = "allwinner,sun5i-a13-display-engine";
                allwinner,pipelines = <&fe0>;
@@ -217,11 +109,11 @@
                        compatible = "allwinner,sun5i-a13-tcon";
                        reg = <0x01c0c000 0x1000>;
                        interrupts = <44>;
-                       resets = <&tcon_ch0_clk 1>;
+                       resets = <&ccu RST_LCD>;
                        reset-names = "lcd";
-                       clocks = <&ahb_gates 36>,
-                                <&tcon_ch0_clk>,
-                                <&tcon_ch1_clk>;
+                       clocks = <&ccu CLK_AHB_LCD>,
+                                <&ccu CLK_TCON_CH0>,
+                                <&ccu CLK_TCON_CH1>;
                        clock-names = "ahb",
                                      "tcon-ch0",
                                      "tcon-ch1";
@@ -254,7 +146,7 @@
                pwm: pwm@01c20e00 {
                        compatible = "allwinner,sun5i-a13-pwm";
                        reg = <0x01c20e00 0xc>;
-                       clocks = <&osc24M>;
+                       clocks = <&ccu CLK_HOSC>;
                        #pwm-cells = <3>;
                        status = "disabled";
                };
@@ -263,11 +155,11 @@
                        compatible = "allwinner,sun5i-a13-display-frontend";
                        reg = <0x01e00000 0x20000>;
                        interrupts = <47>;
-                       clocks = <&ahb_gates 46>, <&de_fe_clk>,
-                                <&dram_gates 25>;
+                       clocks = <&ccu CLK_DE_FE>, <&ccu CLK_DE_FE>,
+                                <&ccu CLK_DRAM_DE_FE>;
                        clock-names = "ahb", "mod",
                                      "ram";
-                       resets = <&de_fe_clk>;
+                       resets = <&ccu RST_DE_FE>;
                        status = "disabled";
 
                        ports {
@@ -290,14 +182,14 @@
                be0: display-backend@01e60000 {
                        compatible = "allwinner,sun5i-a13-display-backend";
                        reg = <0x01e60000 0x10000>;
-                       clocks = <&ahb_gates 44>, <&de_be_clk>,
-                                <&dram_gates 26>;
+                       clocks = <&ccu CLK_AHB_DE_BE>, <&ccu CLK_DE_BE>,
+                                <&ccu CLK_DRAM_DE_BE>;
                        clock-names = "ahb", "mod",
                                      "ram";
-                       resets = <&de_be_clk>;
+                       resets = <&ccu RST_DE_BE>;
                        status = "disabled";
 
-                       assigned-clocks = <&de_be_clk>;
+                       assigned-clocks = <&ccu CLK_DE_BE>;
                        assigned-clock-rates = <300000000>;
 
                        ports {
@@ -330,6 +222,10 @@
        };
 };
 
+&ccu {
+       compatible = "allwinner,sun5i-a13-ccu";
+};
+
 &cpu0 {
        clock-latency = <244144>; /* 8 32k periods */
        operating-points = <