Merge tag 'modules-next-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git...
[sfrench/cifs-2.6.git] / arch / arm / boot / dts / rk3xxx.dtsi
index 8caf85d839019ab1ed47690cf9bb4597de71b2f2..499468d42adac51007f6c663c6b2e0e64cd67ef6 100644 (file)
                i2c2 = &i2c2;
                i2c3 = &i2c3;
                i2c4 = &i2c4;
+               mshc0 = &emmc;
+               mshc1 = &mmc0;
+               mshc2 = &mmc1;
+               spi0 = &spi0;
+               spi1 = &spi1;
+       };
+
+       amba {
+               compatible = "arm,amba-bus";
+               #address-cells = <1>;
+               #size-cells = <1>;
+               ranges;
+
+               dmac1_s: dma-controller@20018000 {
+                       compatible = "arm,pl330", "arm,primecell";
+                       reg = <0x20018000 0x4000>;
+                       interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>;
+                       #dma-cells = <1>;
+                       clocks = <&cru ACLK_DMA1>;
+                       clock-names = "apb_pclk";
+               };
+
+               dmac1_ns: dma-controller@2001c000 {
+                       compatible = "arm,pl330", "arm,primecell";
+                       reg = <0x2001c000 0x4000>;
+                       interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>;
+                       #dma-cells = <1>;
+                       clocks = <&cru ACLK_DMA1>;
+                       clock-names = "apb_pclk";
+                       status = "disabled";
+               };
+
+               dmac2: dma-controller@20078000 {
+                       compatible = "arm,pl330", "arm,primecell";
+                       reg = <0x20078000 0x4000>;
+                       interrupts = <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>;
+                       #dma-cells = <1>;
+                       clocks = <&cru ACLK_DMA2>;
+                       clock-names = "apb_pclk";
+               };
        };
 
        xin24m: oscillator {
                status = "disabled";
        };
 
+       usb_otg: usb@10180000 {
+               compatible = "rockchip,rk3066-usb", "snps,dwc2";
+               reg = <0x10180000 0x40000>;
+               interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
+               clocks = <&cru HCLK_OTG0>;
+               clock-names = "otg";
+               status = "disabled";
+       };
+
+       usb_host: usb@101c0000 {
+               compatible = "snps,dwc2";
+               reg = <0x101c0000 0x40000>;
+               interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
+               clocks = <&cru HCLK_OTG1>;
+               clock-names = "otg";
+               status = "disabled";
+       };
+
+       emac: ethernet@10204000 {
+               compatible = "snps,arc-emac";
+               reg = <0x10204000 0x3c>;
+               interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
+               #address-cells = <1>;
+               #size-cells = <0>;
+
+               rockchip,grf = <&grf>;
+
+               clocks = <&cru HCLK_EMAC>, <&cru SCLK_MAC>;
+               clock-names = "hclk", "macref";
+               max-speed = <100>;
+               phy-mode = "rmii";
+
+               status = "disabled";
+       };
+
        mmc0: dwmmc@10214000 {
                compatible = "rockchip,rk2928-dw-mshc";
                reg = <0x10214000 0x1000>;
                interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
-               #address-cells = <1>;
-               #size-cells = <0>;
 
                clocks = <&cru HCLK_SDMMC>, <&cru SCLK_SDMMC>;
                clock-names = "biu", "ciu";
                compatible = "rockchip,rk2928-dw-mshc";
                reg = <0x10218000 0x1000>;
                interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>;
-               #address-cells = <1>;
-               #size-cells = <0>;
 
                clocks = <&cru HCLK_SDIO>, <&cru SCLK_SDIO>;
                clock-names = "biu", "ciu";
                status = "disabled";
        };
 
+       emmc: dwmmc@1021c000 {
+               compatible = "rockchip,rk2928-dw-mshc";
+               reg = <0x1021c000 0x1000>;
+               interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
+
+               clocks = <&cru HCLK_EMMC>, <&cru SCLK_EMMC>;
+               clock-names = "biu", "ciu";
+
+               status = "disabled";
+       };
+
        pmu: pmu@20004000 {
                compatible = "rockchip,rk3066-pmu", "syscon";
                reg = <0x20004000 0x100>;
                #size-cells = <0>;
 
                rockchip,grf = <&grf>;
-               rockchip,bus-index = <0>;
 
                clock-names = "i2c";
                clocks = <&cru PCLK_I2C0>;
                clocks = <&cru SCLK_UART3>, <&cru PCLK_UART3>;
                status = "disabled";
        };
+
+       saradc: saradc@2006c000 {
+               compatible = "rockchip,saradc";
+               reg = <0x2006c000 0x100>;
+               interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
+               #io-channel-cells = <1>;
+               clocks = <&cru SCLK_SARADC>, <&cru PCLK_SARADC>;
+               clock-names = "saradc", "apb_pclk";
+               status = "disabled";
+       };
+
+       spi0: spi@20070000 {
+               compatible = "rockchip,rk3066-spi";
+               clocks = <&cru SCLK_SPI0>, <&cru PCLK_SPI0>;
+               clock-names = "spiclk", "apb_pclk";
+               interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>;
+               reg = <0x20070000 0x1000>;
+               #address-cells = <1>;
+               #size-cells = <0>;
+               status = "disabled";
+       };
+
+       spi1: spi@20074000 {
+               compatible = "rockchip,rk3066-spi";
+               clocks = <&cru SCLK_SPI1>, <&cru PCLK_SPI1>;
+               clock-names = "spiclk", "apb_pclk";
+               interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>;
+               reg = <0x20074000 0x1000>;
+               #address-cells = <1>;
+               #size-cells = <0>;
+               status = "disabled";
+       };
 };