Merge branch 'pm-cpufreq'

[sfrench/cifs-2.6.git] / arch / arm / boot / dts / rk3288-veyron.dtsi

diff --git a/arch/arm/boot/dts/rk3288-veyron.dtsi b/arch/arm/boot/dts/rk3288-veyron.dtsi
index 2251d28e9d2a4fe949d8dcc2b8e775881e73daef..5d1eb0a2582755b274743bc7fefe556a170eb36b 100644 (file)
--- a/arch/arm/boot/dts/rk3288-veyron.dtsi
+++ b/arch/arm/boot/dts/rk3288-veyron.dtsi
@@ -61,7 +61,7 @@
                pinctrl-0 = <&pwr_key_l>;
                power {
                        label = "Power";
-                       gpios = <&gpio0 5 GPIO_ACTIVE_LOW>;
+                       gpios = <&gpio0 RK_PA5 GPIO_ACTIVE_LOW>;
                        linux,code = <KEY_POWER>;
                        debounce-interval = <100>;
                        wakeup-source;
@@ -70,7 +70,7 @@
 
        gpio-restart {
                compatible = "gpio-restart";
-               gpios = <&gpio0 13 GPIO_ACTIVE_HIGH>;
+               gpios = <&gpio0 RK_PB5 GPIO_ACTIVE_HIGH>;
                pinctrl-names = "default";
                pinctrl-0 = <&ap_warm_reset_h>;
                priority = <200>;
@@ -80,7 +80,7 @@
                compatible = "mmc-pwrseq-emmc";
                pinctrl-0 = <&emmc_reset>;
                pinctrl-names = "default";
-               reset-gpios = <&gpio2 9 GPIO_ACTIVE_HIGH>;
+               reset-gpios = <&gpio2 RK_PB1 GPIO_ACTIVE_HIGH>;
        };
 
        sdio_pwrseq: sdio-pwrseq {
@@ -96,7 +96,7 @@
                 * - SDIO_RESET_L_WL_REG_ON
                 * - PDN (power down when low)
                 */
-               reset-gpios = <&gpio4 28 GPIO_ACTIVE_LOW>;
+               reset-gpios = <&gpio4 RK_PD4 GPIO_ACTIVE_LOW>;
        };
 
        vcc_5v: vcc-5v {
@@ -178,7 +178,7 @@
                reg = <0x1b>;
                clock-output-names = "xin32k", "wifibt_32kin";
                interrupt-parent = <&gpio0>;
-               interrupts = <4 IRQ_TYPE_LEVEL_LOW>;
+               interrupts = <RK_PA4 IRQ_TYPE_LEVEL_LOW>;
                pinctrl-names = "default";
                pinctrl-0 = <&pmic_int_l>;
                rockchip,system-power-controller;