Merge tag 'armsoc-late' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
[sfrench/cifs-2.6.git] / arch / arm / boot / dts / r8a7793.dtsi
index cf6dc2aeef201ab69b9ce589bae18bcd7184ed68..1dd6d202cd4ce54579edf79f90971dd3f91f08bd 100644 (file)
@@ -11,6 +11,7 @@
 #include <dt-bindings/clock/r8a7793-clock.h>
 #include <dt-bindings/interrupt-controller/arm-gic.h>
 #include <dt-bindings/interrupt-controller/irq.h>
+#include <dt-bindings/power/r8a7793-sysc.h>
 
 / {
        compatible = "renesas,r8a7793";
@@ -43,6 +44,7 @@
                        voltage-tolerance = <1>; /* 1% */
                        clocks = <&cpg_clocks R8A7793_CLK_Z>;
                        clock-latency = <300000>; /* 300 us */
+                       power-domains = <&sysc R8A7793_PD_CA15_CPU0>;
 
                        /* kHz - uV - OPPs unknown yet */
                        operating-points = <1500000 1000000>,
@@ -76,6 +78,7 @@
 
        L2_CA15: cache-controller@0 {
                compatible = "cache";
+               power-domains = <&sysc R8A7793_PD_CA15_SCU>;
                cache-unified;
                cache-level = <2>;
        };
                #interrupt-cells = <2>;
                interrupt-controller;
                clocks = <&mstp9_clks R8A7793_CLK_GPIO0>;
-               power-domains = <&cpg_clocks>;
+               power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
        };
 
        gpio1: gpio@e6051000 {
                #interrupt-cells = <2>;
                interrupt-controller;
                clocks = <&mstp9_clks R8A7793_CLK_GPIO1>;
-               power-domains = <&cpg_clocks>;
+               power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
        };
 
        gpio2: gpio@e6052000 {
                #interrupt-cells = <2>;
                interrupt-controller;
                clocks = <&mstp9_clks R8A7793_CLK_GPIO2>;
-               power-domains = <&cpg_clocks>;
+               power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
        };
 
        gpio3: gpio@e6053000 {
                #interrupt-cells = <2>;
                interrupt-controller;
                clocks = <&mstp9_clks R8A7793_CLK_GPIO3>;
-               power-domains = <&cpg_clocks>;
+               power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
        };
 
        gpio4: gpio@e6054000 {
                #interrupt-cells = <2>;
                interrupt-controller;
                clocks = <&mstp9_clks R8A7793_CLK_GPIO4>;
-               power-domains = <&cpg_clocks>;
+               power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
        };
 
        gpio5: gpio@e6055000 {
                #interrupt-cells = <2>;
                interrupt-controller;
                clocks = <&mstp9_clks R8A7793_CLK_GPIO5>;
-               power-domains = <&cpg_clocks>;
+               power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
        };
 
        gpio6: gpio@e6055400 {
                #interrupt-cells = <2>;
                interrupt-controller;
                clocks = <&mstp9_clks R8A7793_CLK_GPIO6>;
-               power-domains = <&cpg_clocks>;
+               power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
        };
 
        gpio7: gpio@e6055800 {
                #interrupt-cells = <2>;
                interrupt-controller;
                clocks = <&mstp9_clks R8A7793_CLK_GPIO7>;
-               power-domains = <&cpg_clocks>;
+               power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
        };
 
        thermal: thermal@e61f0000 {
                reg = <0 0xe61f0000 0 0x14>, <0 0xe61f0100 0 0x38>;
                interrupts = <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
                clocks = <&mstp5_clks R8A7793_CLK_THERMAL>;
-               power-domains = <&cpg_clocks>;
+               power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
                #thermal-sensor-cells = <0>;
        };
 
                             <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>;
                clocks = <&mstp1_clks R8A7793_CLK_CMT0>;
                clock-names = "fck";
-               power-domains = <&cpg_clocks>;
+               power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
 
                renesas,channels-mask = <0x60>;
 
                             <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;
                clocks = <&mstp3_clks R8A7793_CLK_CMT1>;
                clock-names = "fck";
-               power-domains = <&cpg_clocks>;
+               power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
 
                renesas,channels-mask = <0xff>;
 
                             <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>,
                             <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
                clocks = <&mstp4_clks R8A7793_CLK_IRQC>;
-               power-domains = <&cpg_clocks>;
+               power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
        };
 
        dmac0: dma-controller@e6700000 {
                                "ch12", "ch13", "ch14";
                clocks = <&mstp2_clks R8A7793_CLK_SYS_DMAC0>;
                clock-names = "fck";
-               power-domains = <&cpg_clocks>;
+               power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
                #dma-cells = <1>;
                dma-channels = <15>;
        };
                                "ch12", "ch13", "ch14";
                clocks = <&mstp2_clks R8A7793_CLK_SYS_DMAC1>;
                clock-names = "fck";
-               power-domains = <&cpg_clocks>;
+               power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
                #dma-cells = <1>;
                dma-channels = <15>;
        };
                                "ch12";
                clocks = <&mstp5_clks R8A7793_CLK_AUDIO_DMAC0>;
                clock-names = "fck";
-               power-domains = <&cpg_clocks>;
+               power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
                #dma-cells = <1>;
                dma-channels = <13>;
        };
                                "ch12";
                clocks = <&mstp5_clks R8A7793_CLK_AUDIO_DMAC1>;
                clock-names = "fck";
-               power-domains = <&cpg_clocks>;
+               power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
                #dma-cells = <1>;
                dma-channels = <13>;
        };
                reg = <0 0xe6508000 0 0x40>;
                interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
                clocks = <&mstp9_clks R8A7793_CLK_I2C0>;
-               power-domains = <&cpg_clocks>;
+               power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
                i2c-scl-internal-delay-ns = <6>;
                status = "disabled";
        };
                reg = <0 0xe6518000 0 0x40>;
                interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>;
                clocks = <&mstp9_clks R8A7793_CLK_I2C1>;
-               power-domains = <&cpg_clocks>;
+               power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
                i2c-scl-internal-delay-ns = <6>;
                status = "disabled";
        };
                reg = <0 0xe6530000 0 0x40>;
                interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>;
                clocks = <&mstp9_clks R8A7793_CLK_I2C2>;
-               power-domains = <&cpg_clocks>;
+               power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
                i2c-scl-internal-delay-ns = <6>;
                status = "disabled";
        };
                reg = <0 0xe6540000 0 0x40>;
                interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>;
                clocks = <&mstp9_clks R8A7793_CLK_I2C3>;
-               power-domains = <&cpg_clocks>;
+               power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
                i2c-scl-internal-delay-ns = <6>;
                status = "disabled";
        };
                reg = <0 0xe6520000 0 0x40>;
                interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
                clocks = <&mstp9_clks R8A7793_CLK_I2C4>;
-               power-domains = <&cpg_clocks>;
+               power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
                i2c-scl-internal-delay-ns = <6>;
                status = "disabled";
        };
                reg = <0 0xe6528000 0 0x40>;
                interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
                clocks = <&mstp9_clks R8A7793_CLK_I2C5>;
-               power-domains = <&cpg_clocks>;
+               power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
                i2c-scl-internal-delay-ns = <110>;
                status = "disabled";
        };
                clocks = <&mstp9_clks R8A7793_CLK_IICDVFS>;
                dmas = <&dmac0 0x77>, <&dmac0 0x78>;
                dma-names = "tx", "rx";
-               power-domains = <&cpg_clocks>;
+               power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
                status = "disabled";
        };
 
                clocks = <&mstp3_clks R8A7793_CLK_IIC0>;
                dmas = <&dmac0 0x61>, <&dmac0 0x62>;
                dma-names = "tx", "rx";
-               power-domains = <&cpg_clocks>;
+               power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
                status = "disabled";
        };
 
                clocks = <&mstp3_clks R8A7793_CLK_IIC1>;
                dmas = <&dmac0 0x65>, <&dmac0 0x66>;
                dma-names = "tx", "rx";
-               power-domains = <&cpg_clocks>;
+               power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
                status = "disabled";
        };
 
                clocks = <&mstp3_clks R8A7793_CLK_SDHI0>;
                dmas = <&dmac0 0xcd>, <&dmac0 0xce>;
                dma-names = "tx", "rx";
-               power-domains = <&cpg_clocks>;
+               power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
                status = "disabled";
        };
 
                clocks = <&mstp3_clks R8A7793_CLK_SDHI1>;
                dmas = <&dmac0 0xc1>, <&dmac0 0xc2>;
                dma-names = "tx", "rx";
-               power-domains = <&cpg_clocks>;
+               power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
                status = "disabled";
        };
 
                clocks = <&mstp3_clks R8A7793_CLK_SDHI2>;
                dmas = <&dmac0 0xd3>, <&dmac0 0xd4>;
                dma-names = "tx", "rx";
-               power-domains = <&cpg_clocks>;
+               power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
                status = "disabled";
        };
 
                clock-names = "fck";
                dmas = <&dmac0 0x21>, <&dmac0 0x22>;
                dma-names = "tx", "rx";
-               power-domains = <&cpg_clocks>;
+               power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
                status = "disabled";
        };
 
                clock-names = "fck";
                dmas = <&dmac0 0x25>, <&dmac0 0x26>;
                dma-names = "tx", "rx";
-               power-domains = <&cpg_clocks>;
+               power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
                status = "disabled";
        };
 
                clock-names = "fck";
                dmas = <&dmac0 0x27>, <&dmac0 0x28>;
                dma-names = "tx", "rx";
-               power-domains = <&cpg_clocks>;
+               power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
                status = "disabled";
        };
 
                clock-names = "fck";
                dmas = <&dmac0 0x1b>, <&dmac0 0x1c>;
                dma-names = "tx", "rx";
-               power-domains = <&cpg_clocks>;
+               power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
                status = "disabled";
        };
 
                clock-names = "fck";
                dmas = <&dmac0 0x1f>, <&dmac0 0x20>;
                dma-names = "tx", "rx";
-               power-domains = <&cpg_clocks>;
+               power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
                status = "disabled";
        };
 
                clock-names = "fck";
                dmas = <&dmac0 0x23>, <&dmac0 0x24>;
                dma-names = "tx", "rx";
-               power-domains = <&cpg_clocks>;
+               power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
                status = "disabled";
        };
 
                clock-names = "fck";
                dmas = <&dmac0 0x3d>, <&dmac0 0x3e>;
                dma-names = "tx", "rx";
-               power-domains = <&cpg_clocks>;
+               power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
                status = "disabled";
        };
 
                clock-names = "fck";
                dmas = <&dmac0 0x19>, <&dmac0 0x1a>;
                dma-names = "tx", "rx";
-               power-domains = <&cpg_clocks>;
+               power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
                status = "disabled";
        };
 
                clock-names = "fck";
                dmas = <&dmac0 0x1d>, <&dmac0 0x1e>;
                dma-names = "tx", "rx";
-               power-domains = <&cpg_clocks>;
+               power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
                status = "disabled";
        };
 
                clock-names = "fck", "brg_int", "scif_clk";
                dmas = <&dmac0 0x29>, <&dmac0 0x2a>;
                dma-names = "tx", "rx";
-               power-domains = <&cpg_clocks>;
+               power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
                status = "disabled";
        };
 
                clock-names = "fck", "brg_int", "scif_clk";
                dmas = <&dmac0 0x2d>, <&dmac0 0x2e>;
                dma-names = "tx", "rx";
-               power-domains = <&cpg_clocks>;
+               power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
                status = "disabled";
        };
 
                clock-names = "fck", "brg_int", "scif_clk";
                dmas = <&dmac0 0x2b>, <&dmac0 0x2c>;
                dma-names = "tx", "rx";
-               power-domains = <&cpg_clocks>;
+               power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
                status = "disabled";
        };
 
                clock-names = "fck", "brg_int", "scif_clk";
                dmas = <&dmac0 0x2f>, <&dmac0 0x30>;
                dma-names = "tx", "rx";
-               power-domains = <&cpg_clocks>;
+               power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
                status = "disabled";
        };
 
                clock-names = "fck", "brg_int", "scif_clk";
                dmas = <&dmac0 0xfb>, <&dmac0 0xfc>;
                dma-names = "tx", "rx";
-               power-domains = <&cpg_clocks>;
+               power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
                status = "disabled";
        };
 
                clock-names = "fck", "brg_int", "scif_clk";
                dmas = <&dmac0 0xfd>, <&dmac0 0xfe>;
                dma-names = "tx", "rx";
-               power-domains = <&cpg_clocks>;
+               power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
                status = "disabled";
        };
 
                clock-names = "fck", "brg_int", "scif_clk";
                dmas = <&dmac0 0x39>, <&dmac0 0x3a>;
                dma-names = "tx", "rx";
-               power-domains = <&cpg_clocks>;
+               power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
                status = "disabled";
        };
 
                clock-names = "fck", "brg_int", "scif_clk";
                dmas = <&dmac0 0x4d>, <&dmac0 0x4e>;
                dma-names = "tx", "rx";
-               power-domains = <&cpg_clocks>;
+               power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
                status = "disabled";
        };
 
                clock-names = "fck", "brg_int", "scif_clk";
                dmas = <&dmac0 0x3b>, <&dmac0 0x3c>;
                dma-names = "tx", "rx";
-               power-domains = <&cpg_clocks>;
+               power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
                status = "disabled";
        };
 
                reg = <0 0xee700000 0 0x400>;
                interrupts = <GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>;
                clocks = <&mstp8_clks R8A7793_CLK_ETHER>;
-               power-domains = <&cpg_clocks>;
+               power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
                phy-mode = "rmii";
                #address-cells = <1>;
                #size-cells = <0>;
                clocks = <&mstp9_clks R8A7793_CLK_QSPI_MOD>;
                dmas = <&dmac0 0x17>, <&dmac0 0x18>;
                dma-names = "tx", "rx";
-               power-domains = <&cpg_clocks>;
+               power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
                num-cs = <1>;
                #address-cells = <1>;
                #size-cells = <0>;
                clocks = <&mstp9_clks R8A7793_CLK_RCAN0>,
                         <&cpg_clocks R8A7793_CLK_RCAN>, <&can_clk>;
                clock-names = "clkp1", "clkp2", "can_clk";
-               power-domains = <&cpg_clocks>;
+               power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
                status = "disabled";
        };
 
                clocks = <&mstp9_clks R8A7793_CLK_RCAN1>,
                         <&cpg_clocks R8A7793_CLK_RCAN>, <&can_clk>;
                clock-names = "clkp1", "clkp2", "can_clk";
-               power-domains = <&cpg_clocks>;
+               power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
                status = "disabled";
        };
 
                };
        };
 
+       sysc: system-controller@e6180000 {
+               compatible = "renesas,r8a7793-sysc";
+               reg = <0 0xe6180000 0 0x0200>;
+               #power-domain-cells = <1>;
+       };
+
        ipmmu_sy0: mmu@e6280000 {
                compatible = "renesas,ipmmu-r8a7793", "renesas,ipmmu-vmsa";
                reg = <0 0xe6280000 0 0x1000>;
                                "src.4", "src.3", "src.2", "src.1", "src.0",
                                "dvc.0", "dvc.1",
                                "clk_a", "clk_b", "clk_c", "clk_i";
-               power-domains = <&cpg_clocks>;
+               power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
 
                status = "disabled";