Merge branch 'next' of git://git.kernel.org/pub/scm/linux/kernel/git/rzhang/linux
[sfrench/cifs-2.6.git] / arch / arm / boot / dts / r7s72100-rskrza1.dts
index 72df20a04320e7ac61dccde306f5799bdf1bd78c..5dcaaf131d2788ac55be89d3d4d9f9ced9beac9e 100644 (file)
@@ -10,6 +10,8 @@
 
 /dts-v1/;
 #include "r7s72100.dtsi"
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/pinctrl/r7s72100-pinctrl.h>
 
 / {
        model = "RSKRZA1";
                #address-cells = <1>;
                #size-cells = <1>;
        };
+
+       leds {
+               status = "okay";
+               compatible = "gpio-leds";
+
+               led0 {
+                       gpios = <&port7 1 GPIO_ACTIVE_LOW>;
+               };
+       };
 };
 
 &extal_clk {
        clock-frequency = <32768>;
 };
 
+&pinctrl {
+
+       /* Serial Console */
+       scif2_pins: serial2 {
+               pinmux = <RZA1_PINMUX(3, 0, 6)>,        /* TxD2 */
+                        <RZA1_PINMUX(3, 2, 4)>;        /* RxD2 */
+       };
+
+       /* Ethernet */
+       ether_pins: ether {
+               /* Ethernet on Ports 1,2,3,5 */
+               pinmux = <RZA1_PINMUX(1, 14, 4)>,       /* ET_COL   */
+                        <RZA1_PINMUX(5, 9, 2)>,        /* ET_MDC   */
+                        <RZA1_PINMUX(3, 3, 2)>,        /* ET_MDIO  */
+                        <RZA1_PINMUX(3, 4, 2)>,        /* ET_RXCLK */
+                        <RZA1_PINMUX(3, 5, 2)>,        /* ET_RXER  */
+                        <RZA1_PINMUX(3, 6, 2)>,        /* ET_RXDV  */
+                        <RZA1_PINMUX(2, 0, 2)>,        /* ET_TXCLK */
+                        <RZA1_PINMUX(2, 1, 2)>,        /* ET_TXER  */
+                        <RZA1_PINMUX(2, 2, 2)>,        /* ET_TXEN  */
+                        <RZA1_PINMUX(2, 3, 2)>,        /* ET_CRS   */
+                        <RZA1_PINMUX(2, 4, 2)>,        /* ET_TXD0  */
+                        <RZA1_PINMUX(2, 5, 2)>,        /* ET_TXD1  */
+                        <RZA1_PINMUX(2, 6, 2)>,        /* ET_TXD2  */
+                        <RZA1_PINMUX(2, 7, 2)>,        /* ET_TXD3  */
+                        <RZA1_PINMUX(2, 8, 2)>,        /* ET_RXD0  */
+                        <RZA1_PINMUX(2, 9, 2)>,        /* ET_RXD1  */
+                        <RZA1_PINMUX(2, 10, 2)>,       /* ET_RXD2  */
+                        <RZA1_PINMUX(2, 11, 2)>;       /* ET_RXD3  */
+       };
+
+       /* SDHI ch1 on CN1 */
+       sdhi1_pins: sdhi1 {
+               pinmux = <RZA1_PINMUX(3, 8, 7)>,        /* SD_CD_1 */
+                        <RZA1_PINMUX(3, 9, 7)>,        /* SD_WP_1 */
+                        <RZA1_PINMUX(3, 10, 7)>,       /* SD_D1_1 */
+                        <RZA1_PINMUX(3, 11, 7)>,       /* SD_D0_1 */
+                        <RZA1_PINMUX(3, 12, 7)>,       /* SD_CLK_1 */
+                        <RZA1_PINMUX(3, 13, 7)>,       /* SD_CMD_1 */
+                        <RZA1_PINMUX(3, 14, 7)>,       /* SD_D3_1 */
+                        <RZA1_PINMUX(3, 15, 7)>;       /* SD_D2_1 */
+       };
+};
+
 &mtu2 {
        status = "okay";
 };
 
 &ether {
+       pinctrl-names = "default";
+       pinctrl-0 = <&ether_pins>;
        status = "okay";
        renesas,no-ether-link;
        phy-handle = <&phy0>;
 };
 
 &sdhi1 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&sdhi1_pins>;
        bus-width = <4>;
        status = "okay";
 };
 };
 
 &scif2 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&scif2_pins>;
        status = "okay";
 };