Merge tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
[sfrench/cifs-2.6.git] / arch / arm / boot / dts / omap4.dtsi
index 60244b7a993e50ad6db92923f2da9d764c56f02c..475904894b8633464173b1b76f85e378c13ff4cb 100644 (file)
@@ -6,9 +6,12 @@
  * published by the Free Software Foundation.
  */
 
+#include <dt-bindings/bus/ti-sysc.h>
+#include <dt-bindings/clock/omap4.h>
 #include <dt-bindings/gpio/gpio.h>
 #include <dt-bindings/interrupt-controller/arm-gic.h>
 #include <dt-bindings/pinctrl/omap.h>
+#include <dt-bindings/clock/omap4.h>
 
 / {
        compatible = "ti,omap4430", "ti,omap4";
                        ranges = <0 0x4a000000 0x1000000>;
 
                        cm1: cm1@4000 {
-                               compatible = "ti,omap4-cm1";
+                               compatible = "ti,omap4-cm1", "simple-bus";
                                reg = <0x4000 0x2000>;
+                               #address-cells = <1>;
+                               #size-cells = <1>;
+                               ranges = <0 0x4000 0x2000>;
 
                                cm1_clocks: clocks {
                                        #address-cells = <1>;
                        };
 
                        cm2: cm2@8000 {
-                               compatible = "ti,omap4-cm2";
+                               compatible = "ti,omap4-cm2", "simple-bus";
                                reg = <0x8000 0x3000>;
+                               #address-cells = <1>;
+                               #size-cells = <1>;
+                               ranges = <0 0x8000 0x3000>;
 
                                cm2_clocks: clocks {
                                        #address-cells = <1>;
                                        compatible = "ti,omap4-prm";
                                        reg = <0x6000 0x3000>;
                                        interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
+                                       #address-cells = <1>;
+                                       #size-cells = <1>;
+                                       ranges = <0 0x6000 0x3000>;
 
                                        prm_clocks: clocks {
                                                #address-cells = <1>;
                        reg = <0x48076000 0x4>,
                              <0x48076010 0x4>;
                        reg-names = "rev", "sysc";
+                       ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>;
+                       ti,sysc-sidle = <SYSC_IDLE_FORCE>,
+                                       <SYSC_IDLE_NO>,
+                                       <SYSC_IDLE_SMART>,
+                                       <SYSC_IDLE_SMART_WKUP>;
+                       clocks = <&l4_per_clkctrl OMAP4_SLIMBUS2_CLKCTRL 0>;
+                       clock-names = "fck";
                        #address-cells = <1>;
                        #size-cells = <1>;
                        ranges = <0 0x48076000 0x001000>;
                target-module@4a0db000 {
                        compatible = "ti,sysc-omap4-sr", "ti,sysc";
                        ti,hwmods = "smartreflex_iva";
-                       reg = <0x4a0db000 0x4>,
-                             <0x4a0db008 0x4>;
-                       reg-names = "rev", "sysc";
+                       reg = <0x4a0db038 0x4>;
+                       reg-names = "sysc";
+                       ti,sysc-mask = <SYSC_OMAP3_SR_ENAWAKEUP>;
+                       ti,sysc-sidle = <SYSC_IDLE_FORCE>,
+                                       <SYSC_IDLE_NO>,
+                                       <SYSC_IDLE_SMART>,
+                                       <SYSC_IDLE_SMART_WKUP>;
+                       clocks = <&l4_ao_clkctrl OMAP4_SMARTREFLEX_IVA_CLKCTRL 0>;
+                       clock-names = "fck";
                        #address-cells = <1>;
                        #size-cells = <1>;
                        ranges = <0 0x4a0db000 0x001000>;
                target-module@4a0dd000 {
                        compatible = "ti,sysc-omap4-sr", "ti,sysc";
                        ti,hwmods = "smartreflex_core";
-                       reg = <0x4a0dd000 0x4>,
-                             <0x4a0dd008 0x4>;
-                       reg-names = "rev", "sysc";
+                       reg = <0x4a0dd038 0x4>;
+                       reg-names = "sysc";
+                       ti,sysc-mask = <SYSC_OMAP3_SR_ENAWAKEUP>;
+                       ti,sysc-sidle = <SYSC_IDLE_FORCE>,
+                                       <SYSC_IDLE_NO>,
+                                       <SYSC_IDLE_SMART>,
+                                       <SYSC_IDLE_SMART_WKUP>;
+                       clocks = <&l4_ao_clkctrl OMAP4_SMARTREFLEX_CORE_CLKCTRL 0>;
+                       clock-names = "fck";
                        #address-cells = <1>;
                        #size-cells = <1>;
                        ranges = <0 0x4a0dd000 0x001000>;
                target-module@4a0d9000 {
                        compatible = "ti,sysc-omap4-sr", "ti,sysc";
                        ti,hwmods = "smartreflex_mpu";
-                       reg = <0x4a0d9000 0x4>,
-                             <0x4a0d9008 0x4>;
-                       reg-names = "rev", "sysc";
+                       reg = <0x4a0d9038 0x4>;
+                       reg-names = "sysc";
+                       ti,sysc-mask = <SYSC_OMAP3_SR_ENAWAKEUP>;
+                       ti,sysc-sidle = <SYSC_IDLE_FORCE>,
+                                       <SYSC_IDLE_NO>,
+                                       <SYSC_IDLE_SMART>,
+                                       <SYSC_IDLE_SMART_WKUP>;
+                       clocks = <&l4_ao_clkctrl OMAP4_SMARTREFLEX_MPU_CLKCTRL 0>;
+                       clock-names = "fck";
                        #address-cells = <1>;
                        #size-cells = <1>;
                        ranges = <0 0x4a0d9000 0x001000>;
                        reg-names = "sys", "gdd";
                        ti,hwmods = "hsi";
 
-                       clocks = <&hsi_fck>;
+                       clocks = <&l3_init_clkctrl OMAP4_HSI_CLKCTRL 0>;
                        clock-names = "hsi_fck";
 
                        interrupts = <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>;
                        reg = <0x52000000 0x4>,
                              <0x52000010 0x4>;
                        reg-names = "rev", "sysc";
+                       ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>;
+                       ti,sysc-midle = <SYSC_IDLE_FORCE>,
+                                       <SYSC_IDLE_NO>,
+                                       <SYSC_IDLE_SMART>,
+                                       <SYSC_IDLE_SMART_WKUP>;
+                       ti,sysc-sidle = <SYSC_IDLE_FORCE>,
+                                       <SYSC_IDLE_NO>,
+                                       <SYSC_IDLE_SMART>,
+                                       <SYSC_IDLE_SMART_WKUP>;
+                       ti,sysc-delay-us = <2>;
+                       clocks = <&iss_clkctrl OMAP4_ISS_CLKCTRL 0>;
+                       clock-names = "fck";
                        #address-cells = <1>;
                        #size-cells = <1>;
                        ranges = <0 0x52000000 0x1000000>;
                target-module@40128000 {
                        compatible = "ti,sysc-mcasp", "ti,sysc";
                        ti,hwmods = "mcasp";
-                       reg = <0x40128004 0x4>;
-                       reg-names = "sysc";
+                       reg = <0x40128000 0x4>,
+                             <0x40128004 0x4>;
+                       reg-names = "rev", "sysc";
+                       ti,sysc-sidle = <SYSC_IDLE_FORCE>,
+                                       <SYSC_IDLE_NO>,
+                                       <SYSC_IDLE_SMART>,
+                                       <SYSC_IDLE_SMART_WKUP>;
+                       clocks = <&abe_clkctrl OMAP4_MCASP_CLKCTRL 0>;
+                       clock-names = "fck";
                        #address-cells = <1>;
                        #size-cells = <1>;
                        ranges = <0x00000000 0x40128000 0x1000>, /* MPU */
                        reg = <0x4012c000 0x4>,
                              <0x4012c010 0x4>;
                        reg-names = "rev", "sysc";
+                       ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>;
+                       ti,sysc-sidle = <SYSC_IDLE_FORCE>,
+                                       <SYSC_IDLE_NO>,
+                                       <SYSC_IDLE_SMART>,
+                                       <SYSC_IDLE_SMART_WKUP>;
+                       clocks = <&abe_clkctrl OMAP4_SLIMBUS1_CLKCTRL 0>;
+                       clock-names = "fck";
                        #address-cells = <1>;
                        #size-cells = <1>;
                        ranges = <0x00000000 0x4012c000 0x1000>, /* MPU */
                        reg = <0x401f1000 0x4>,
                              <0x401f1010 0x4>;
                        reg-names = "rev", "sysc";
+                       ti,sysc-midle = <SYSC_IDLE_FORCE>,
+                                       <SYSC_IDLE_NO>,
+                                       <SYSC_IDLE_SMART>,
+                                       <SYSC_IDLE_SMART_WKUP>;
+                       ti,sysc-sidle = <SYSC_IDLE_FORCE>,
+                                       <SYSC_IDLE_NO>,
+                                       <SYSC_IDLE_SMART>;
+                       clocks = <&abe_clkctrl OMAP4_AESS_CLKCTRL 0>;
+                       clock-names = "fck";
                        #address-cells = <1>;
                        #size-cells = <1>;
                        ranges = <0x00000000 0x401f1000 0x1000>, /* MPU */
                        reg = <0x4a10a000 0x4>,
                              <0x4a10a010 0x4>;
                        reg-names = "rev", "sysc";
+                       ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>;
+                       ti,sysc-midle = <SYSC_IDLE_FORCE>,
+                                       <SYSC_IDLE_NO>,
+                                       <SYSC_IDLE_SMART>;
+                       ti,sysc-sidle = <SYSC_IDLE_FORCE>,
+                                       <SYSC_IDLE_NO>,
+                                       <SYSC_IDLE_SMART>;
+                       ti,sysc-delay-us = <2>;
+                       clocks = <&iss_clkctrl OMAP4_FDIF_CLKCTRL 0>;
+                       clock-names = "fck";
                        #address-cells = <1>;
                        #size-cells = <1>;
                        ranges = <0 0x4a10a000 0x1000>;
                        interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
                        ti,hwmods = "timer1";
                        ti,timer-alwon;
+                       clocks = <&l4_wkup_clkctrl OMAP4_TIMER1_CLKCTRL 24>;
+                       clock-names = "fck";
                };
 
                timer2: timer@48032000 {
                        reg = <0x5601fc00 0x4>,
                              <0x5601fc10 0x4>;
                        reg-names = "rev", "sysc";
+                       ti,sysc-midle = <SYSC_IDLE_FORCE>,
+                                       <SYSC_IDLE_NO>,
+                                       <SYSC_IDLE_SMART>,
+                                       <SYSC_IDLE_SMART_WKUP>;
+                       ti,sysc-sidle = <SYSC_IDLE_FORCE>,
+                                       <SYSC_IDLE_NO>,
+                                       <SYSC_IDLE_SMART>,
+                                       <SYSC_IDLE_SMART_WKUP>;
+                       clocks = <&l3_gfx_clkctrl OMAP4_GPU_CLKCTRL 0>;
+                       clock-names = "fck";
                        #address-cells = <1>;
                        #size-cells = <1>;
                        ranges = <0 0x56000000 0x2000000>;
                        reg = <0x58000000 0x80>;
                        status = "disabled";
                        ti,hwmods = "dss_core";
-                       clocks = <&dss_dss_clk>;
+                       clocks = <&l3_dss_clkctrl OMAP4_DSS_CORE_CLKCTRL 8>;
                        clock-names = "fck";
                        #address-cells = <1>;
                        #size-cells = <1>;
                                reg = <0x58001000 0x1000>;
                                interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
                                ti,hwmods = "dss_dispc";
-                               clocks = <&dss_dss_clk>;
+                               clocks = <&l3_dss_clkctrl OMAP4_DSS_CORE_CLKCTRL 8>;
                                clock-names = "fck";
                        };
 
                                reg = <0x58002000 0x1000>;
                                status = "disabled";
                                ti,hwmods = "dss_rfbi";
-                               clocks = <&dss_dss_clk>, <&l3_div_ck>;
+                               clocks = <&l3_dss_clkctrl OMAP4_DSS_CORE_CLKCTRL 8>, <&l3_div_ck>;
                                clock-names = "fck", "ick";
                        };
 
                                reg = <0x58003000 0x1000>;
                                status = "disabled";
                                ti,hwmods = "dss_venc";
-                               clocks = <&dss_tv_clk>;
+                               clocks = <&l3_dss_clkctrl OMAP4_DSS_CORE_CLKCTRL 11>;
                                clock-names = "fck";
                        };
 
                                interrupts = <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>;
                                status = "disabled";
                                ti,hwmods = "dss_dsi1";
-                               clocks = <&dss_dss_clk>, <&dss_sys_clk>;
+                               clocks = <&l3_dss_clkctrl OMAP4_DSS_CORE_CLKCTRL 8>,
+                                        <&l3_dss_clkctrl OMAP4_DSS_CORE_CLKCTRL 10>;
                                clock-names = "fck", "sys_clk";
                        };
 
                                interrupts = <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>;
                                status = "disabled";
                                ti,hwmods = "dss_dsi2";
-                               clocks = <&dss_dss_clk>, <&dss_sys_clk>;
+                               clocks = <&l3_dss_clkctrl OMAP4_DSS_CORE_CLKCTRL 8>,
+                                        <&l3_dss_clkctrl OMAP4_DSS_CORE_CLKCTRL 10>;
                                clock-names = "fck", "sys_clk";
                        };
 
                                interrupts = <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>;
                                status = "disabled";
                                ti,hwmods = "dss_hdmi";
-                               clocks = <&dss_48mhz_clk>, <&dss_sys_clk>;
+                               clocks = <&l3_dss_clkctrl OMAP4_DSS_CORE_CLKCTRL 9>,
+                                        <&l3_dss_clkctrl OMAP4_DSS_CORE_CLKCTRL 10>;
                                clock-names = "fck", "sys_clk";
                                dmas = <&sdma 76>;
                                dma-names = "audio_tx";
        };
 };
 
-/include/ "omap44xx-clocks.dtsi"
+#include "omap44xx-clocks.dtsi"