Merge tag 'trace-v5.1' of git://git.kernel.org/pub/scm/linux/kernel/git/rostedt/linux...

[sfrench/cifs-2.6.git] / arch / arm / boot / dts / meson8.dtsi

diff --git a/arch/arm/boot/dts/meson8.dtsi b/arch/arm/boot/dts/meson8.dtsi
index e5cd325d7ea8302349118fc82a2fd915825156b9..a9781243453ecb5a81a118465801efafb3e2e2cd 100644 (file)
--- a/arch/arm/boot/dts/meson8.dtsi
+++ b/arch/arm/boot/dts/meson8.dtsi
@@ -166,6 +166,32 @@
                };
        };
 
+       gpu_opp_table: gpu-opp-table {
+               compatible = "operating-points-v2";
+
+               opp-182150000 {
+                       opp-hz = /bits/ 64 <182150000>;
+                       opp-microvolt = <1150000>;
+               };
+               opp-318750000 {
+                       opp-hz = /bits/ 64 <318750000>;
+                       opp-microvolt = <1150000>;
+               };
+               opp-425000000 {
+                       opp-hz = /bits/ 64 <425000000>;
+                       opp-microvolt = <1150000>;
+               };
+               opp-510000000 {
+                       opp-hz = /bits/ 64 <510000000>;
+                       opp-microvolt = <1150000>;
+               };
+               opp-637500000 {
+                       opp-hz = /bits/ 64 <637500000>;
+                       opp-microvolt = <1150000>;
+                       turbo-mode;
+               };
+       };
+
        pmu {
                compatible = "arm,cortex-a9-pmu";
                interrupts = <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>,
@@ -201,6 +227,46 @@
                        no-map;
                };
        };
+
+       apb: bus@d0000000 {
+               compatible = "simple-bus";
+               reg = <0xd0000000 0x200000>;
+               #address-cells = <1>;
+               #size-cells = <1>;
+               ranges = <0x0 0xd0000000 0x200000>;
+
+               mali: gpu@c0000 {
+                       compatible = "amlogic,meson8-mali", "arm,mali-450";
+                       reg = <0xc0000 0x40000>;
+                       interrupts = <GIC_SPI 160 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 172 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 172 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 176 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 177 IRQ_TYPE_LEVEL_HIGH>;
+                       interrupt-names = "gp", "gpmmu", "pp", "pmu",
+                                         "pp0", "ppmmu0", "pp1", "ppmmu1",
+                                         "pp2", "ppmmu2", "pp4", "ppmmu4",
+                                         "pp5", "ppmmu5", "pp6", "ppmmu6";
+                       resets = <&reset RESET_MALI>;
+                       clocks = <&clkc CLKID_CLK81>, <&clkc CLKID_MALI>;
+                       clock-names = "bus", "core";
+                       operating-points-v2 = <&gpu_opp_table>;
+                       switch-delay = <0xffff>;
+               };
+       };
 }; /* end of / */
 
 &aobus {
@@ -261,13 +327,6 @@
 };
 
 &cbus {
-       clkc: clock-controller@4000 {
-               #clock-cells = <1>;
-               #reset-cells = <1>;
-               compatible = "amlogic,meson8-clkc";
-               reg = <0x8000 0x4>, <0x4000 0x400>;
-       };
-
        reset: reset-controller@4404 {
                compatible = "amlogic,meson8b-reset";
                reg = <0x4404 0x9c>;
@@ -390,6 +449,11 @@
        compatible = "amlogic,meson8-efuse";
        clocks = <&clkc CLKID_EFUSE>;
        clock-names = "core";
+
+       temperature_calib: calib@1f4 {
+               /* only the upper two bytes are relevant */
+               reg = <0x1f4 0x4>;
+       };
 };
 
 &ethmac {
@@ -402,6 +466,14 @@
        status = "okay";
 };
 
+&hhi {
+       clkc: clock-controller {
+               compatible = "amlogic,meson8-clkc";
+               #clock-cells = <1>;
+               #reset-cells = <1>;
+       };
+};
+
 &hwrng {
        compatible = "amlogic,meson8-rng", "amlogic,meson-rng";
        clocks = <&clkc CLKID_RNG0>;
@@ -469,6 +541,9 @@
        clocks = <&clkc CLKID_XTAL>,
                <&clkc CLKID_SAR_ADC>;
        clock-names = "clkin", "core";
+       amlogic,hhi-sysctrl = <&hhi>;
+       nvmem-cells = <&temperature_calib>;
+       nvmem-cell-names = "temperature_calib";
 };
 
 &sdio {