Merge tag 'imx-dt-4.15' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo...

[sfrench/cifs-2.6.git] / arch / arm / boot / dts / imx6qdl-tx6.dtsi

diff --git a/arch/arm/boot/dts/imx6qdl-tx6.dtsi b/arch/arm/boot/dts/imx6qdl-tx6.dtsi
index c6bec97fbeaf567c19046c8b39ec1f6dddbcdd5c..6abb66cd7d4ac43ee9d837413f02c73f631a9885 100644 (file)
--- a/arch/arm/boot/dts/imx6qdl-tx6.dtsi
+++ b/arch/arm/boot/dts/imx6qdl-tx6.dtsi
@@ -1,5 +1,5 @@
 /*
- * Copyright 2014-2016 Lothar Waßmann <LW@KARO-electronics.de>
+ * Copyright 2014-2017 Lothar Waßmann <LW@KARO-electronics.de>
  *
  * This file is dual-licensed: you can use it either under the terms
  * of the GPL or the X11 license, at your option. Note that this dual
@@ -43,6 +43,7 @@
 #include <dt-bindings/input/input.h>
 #include <dt-bindings/interrupt-controller/irq.h>
 #include <dt-bindings/pwm/pwm.h>
+#include <dt-bindings/sound/fsl-imx-audmux.h>
 
 / {
        aliases {
@@ -145,7 +146,7 @@
                pinctrl-0 = <&pinctrl_lcd0_pwr>;
                gpio = <&gpio3 29 GPIO_ACTIVE_HIGH>;
                enable-active-high;
-               regulator-boot-on;
+               status = "disabled";
        };
 
        reg_lcd1_pwr: regulator-lcd1-pwr {
@@ -157,7 +158,7 @@
                pinctrl-0 = <&pinctrl_lcd1_pwr>;
                gpio = <&gpio2 31 GPIO_ACTIVE_HIGH>;
                enable-active-high;
-               regulator-boot-on;
+               status = "disabled";
        };
 
        reg_usbh1_vbus: regulator-usbh1-vbus {
@@ -183,24 +184,56 @@
        };
 
        sound {
-               compatible = "karo,imx6qdl-tx6qdl-sgtl5000",
-                            "fsl,imx-audio-sgtl5000";
-               model = "sgtl5000-audio";
+               compatible = "karo,imx6qdl-tx6-sgtl5000",
+                            "simple-audio-card";
+               simple-audio-card,name = "imx6qdl-tx6-sgtl5000-audio";
                pinctrl-names = "default";
                pinctrl-0 = <&pinctrl_audmux>;
-               ssi-controller = <&ssi1>;
-               audio-codec = <&sgtl5000>;
-               audio-routing =
+               simple-audio-card,format = "i2s";
+               simple-audio-card,bitclock-master = <&codec_dai>;
+               simple-audio-card,frame-master = <&codec_dai>;
+               simple-audio-card,widgets =
+                       "Microphone", "Mic Jack",
+                       "Line", "Line In",
+                       "Line", "Line Out",
+                       "Headphone", "Headphone Jack";
+               simple-audio-card,routing =
                        "MIC_IN", "Mic Jack",
                        "Mic Jack", "Mic Bias",
                        "Headphone Jack", "HP_OUT";
-               mux-int-port = <1>;
-               mux-ext-port = <5>;
+
+               cpu_dai: simple-audio-card,cpu {
+                       sound-dai = <&ssi1>;
+               };
+
+               codec_dai: simple-audio-card,codec {
+                       sound-dai = <&sgtl5000>;
+               };
        };
 };
 
 &audmux {
        status = "okay";
+
+       ssi1 {
+               fsl,audmux-port = <0>;
+               fsl,port-config = <
+                       (IMX_AUDMUX_V2_PTCR_SYN |
+                       IMX_AUDMUX_V2_PTCR_TFSEL(4) |
+                       IMX_AUDMUX_V2_PTCR_TCSEL(4) |
+                       IMX_AUDMUX_V2_PTCR_TFSDIR |
+                       IMX_AUDMUX_V2_PTCR_TCLKDIR)
+                       IMX_AUDMUX_V2_PDCR_RXDSEL(4)
+               >;
+       };
+
+       pins5 {
+               fsl,audmux-port = <4>;
+               fsl,port-config = <
+                       IMX_AUDMUX_V2_PTCR_SYN
+                       IMX_AUDMUX_V2_PDCR_RXDSEL(0)
+               >;
+       };
 };
 
 &can1 {
@@ -241,7 +274,7 @@
 
 &fec {
        pinctrl-names = "default";
-       pinctrl-0 = <&pinctrl_enet>;
+       pinctrl-0 = <&pinctrl_enet &pinctrl_enet_mdio &pinctrl_etnphy_rst>;
        clocks = <&clks IMX6QDL_CLK_ENET>,
                 <&clks IMX6QDL_CLK_ENET>,
                 <&clks IMX6QDL_CLK_ENET_REF>,
@@ -249,6 +282,7 @@
        clock-names = "ipg", "ahb", "ptp", "enet_out";
        phy-mode = "rmii";
        phy-reset-gpios = <&gpio7 6 GPIO_ACTIVE_LOW>;
+       phy-reset-post-delay = <10>;
        phy-handle = <&etnphy>;
        phy-supply = <&reg_3v3_etn>;
        status = "okay";
@@ -261,8 +295,9 @@
                        compatible = "ethernet-phy-ieee802.3-c22";
                        reg = <0>;
                        pinctrl-names = "default";
-                       pinctrl-0 = <&pinctrl_enet_mdio>;
-                       interrupts-extended = <&gpio7 1 IRQ_TYPE_EDGE_FALLING>;
+                       pinctrl-0 = <&pinctrl_etnphy_int>;
+                       interrupt-parent = <&gpio7>;
+                       interrupts = <1 IRQ_TYPE_EDGE_FALLING>;
                };
        };
 };
@@ -276,25 +311,34 @@
 };
 
 &i2c1 {
-       pinctrl-names = "default";
+       pinctrl-names = "default", "gpio";
        pinctrl-0 = <&pinctrl_i2c1>;
+       pinctrl-1 = <&pinctrl_i2c1_gpio>;
+       scl-gpios = <&gpio3 21 GPIO_ACTIVE_HIGH>;
+       sda-gpios = <&gpio3 28 GPIO_ACTIVE_HIGH>;
        clock-frequency = <400000>;
        status = "okay";
 
        ds1339: rtc@68 {
                compatible = "dallas,ds1339";
                reg = <0x68>;
+               trickle-resistor-ohms = <250>;
+               trickle-diode-disable;
        };
 };
 
 &i2c3 {
-       pinctrl-names = "default";
+       pinctrl-names = "default", "gpio";
        pinctrl-0 = <&pinctrl_i2c3>;
+       pinctrl-1 = <&pinctrl_i2c3_gpio>;
+       scl-gpios = <&gpio1 3 GPIO_ACTIVE_HIGH>;
+       sda-gpios = <&gpio1 6 GPIO_ACTIVE_HIGH>;
        clock-frequency = <400000>;
        status = "okay";
 
-       sgtl5000: sgtl5000@0a {
+       sgtl5000: sgtl5000@a {
                compatible = "fsl,sgtl5000";
+               #sound-dai-cells = <0>;
                reg = <0x0a>;
                VDDA-supply = <&reg_2v5>;
                VDDIO-supply = <&reg_3v3>;
@@ -332,8 +376,6 @@
 
        pinctrl_hog: hoggrp {
                fsl,pins = <
-                       MX6QDL_PAD_SD3_DAT2__GPIO7_IO06         0x1b0b1 /* ETN PHY RESET */
-                       MX6QDL_PAD_SD3_DAT4__GPIO7_IO01         0x1b0b1 /* ETN PHY INT */
                        MX6QDL_PAD_EIM_A25__GPIO5_IO02          0x1b0b1 /* PWR BTN */
                >;
        };
@@ -451,12 +493,24 @@
                >;
        };
 
+       pinctrl_etnphy_int: etnphy-intgrp {
+               fsl,pins = <
+                       MX6QDL_PAD_SD3_DAT4__GPIO7_IO01         0x1b0b1 /* ETN PHY INT */
+               >;
+       };
+
        pinctrl_etnphy_power: etnphy-pwrgrp {
                fsl,pins = <
                        MX6QDL_PAD_EIM_D20__GPIO3_IO20          0x1b0b1 /* ETN PHY POWER */
                >;
        };
 
+       pinctrl_etnphy_rst: etnphy-rstgrp {
+               fsl,pins = <
+                       MX6QDL_PAD_SD3_DAT2__GPIO7_IO06         0x1b0b1 /* ETN PHY RESET */
+               >;
+       };
+
        pinctrl_flexcan1: flexcan1grp {
                fsl,pins = <
                        MX6QDL_PAD_GPIO_7__FLEXCAN1_TX          0x1b0b0
@@ -504,6 +558,13 @@
                >;
        };
 
+       pinctrl_i2c1_gpio: i2c1-gpiogrp {
+               fsl,pins = <
+                       MX6QDL_PAD_EIM_D21__GPIO3_IO21          0x4001b8b1
+                       MX6QDL_PAD_EIM_D28__GPIO3_IO28          0x4001b8b1
+               >;
+       };
+
        pinctrl_i2c3: i2c3grp {
                fsl,pins = <
                        MX6QDL_PAD_GPIO_3__I2C3_SCL             0x4001b8b1
@@ -511,6 +572,13 @@
                >;
        };
 
+       pinctrl_i2c3_gpio: i2c3-gpiogrp {
+               fsl,pins = <
+                       MX6QDL_PAD_GPIO_3__GPIO1_IO03           0x4001b8b1
+                       MX6QDL_PAD_GPIO_6__GPIO1_IO06           0x4001b8b1
+               >;
+       };
+
        pinctrl_kpp: kppgrp {
                fsl,pins = <
                        MX6QDL_PAD_GPIO_9__KEY_COL6             0x1b0b1